1//===- PPCInstrVSX.td - The PowerPC VSX Extension --*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes the VSX extension to the PowerPC instruction set. 11// 12//===----------------------------------------------------------------------===// 13 14def PPCRegVSRCAsmOperand : AsmOperandClass { 15 let Name = "RegVSRC"; let PredicateMethod = "isVSRegNumber"; 16} 17def vsrc : RegisterOperand<VSRC> { 18 let ParserMatchClass = PPCRegVSRCAsmOperand; 19} 20 21def PPCRegVSFRCAsmOperand : AsmOperandClass { 22 let Name = "RegVSFRC"; let PredicateMethod = "isVSRegNumber"; 23} 24def vsfrc : RegisterOperand<VSFRC> { 25 let ParserMatchClass = PPCRegVSFRCAsmOperand; 26} 27 28// Little-endian-specific nodes. 29def SDT_PPClxvd2x : SDTypeProfile<1, 1, [ 30 SDTCisVT<0, v2f64>, SDTCisPtrTy<1> 31]>; 32def SDT_PPCstxvd2x : SDTypeProfile<0, 2, [ 33 SDTCisVT<0, v2f64>, SDTCisPtrTy<1> 34]>; 35def SDT_PPCxxswapd : SDTypeProfile<1, 1, [ 36 SDTCisSameAs<0, 1> 37]>; 38 39def PPClxvd2x : SDNode<"PPCISD::LXVD2X", SDT_PPClxvd2x, 40 [SDNPHasChain, SDNPMayLoad]>; 41def PPCstxvd2x : SDNode<"PPCISD::STXVD2X", SDT_PPCstxvd2x, 42 [SDNPHasChain, SDNPMayStore]>; 43def PPCxxswapd : SDNode<"PPCISD::XXSWAPD", SDT_PPCxxswapd, [SDNPHasChain]>; 44def PPCmfvsr : SDNode<"PPCISD::MFVSR", SDTUnaryOp, []>; 45def PPCmtvsra : SDNode<"PPCISD::MTVSRA", SDTUnaryOp, []>; 46def PPCmtvsrz : SDNode<"PPCISD::MTVSRZ", SDTUnaryOp, []>; 47 48multiclass XX3Form_Rcr<bits<6> opcode, bits<7> xo, dag OOL, dag IOL, 49 string asmbase, string asmstr, InstrItinClass itin, 50 list<dag> pattern> { 51 let BaseName = asmbase in { 52 def NAME : XX3Form_Rc<opcode, xo, OOL, IOL, 53 !strconcat(asmbase, !strconcat(" ", asmstr)), itin, 54 pattern>; 55 let Defs = [CR6] in 56 def o : XX3Form_Rc<opcode, xo, OOL, IOL, 57 !strconcat(asmbase, !strconcat(". ", asmstr)), itin, 58 []>, isDOT; 59 } 60} 61 62def HasVSX : Predicate<"PPCSubTarget->hasVSX()">; 63def IsLittleEndian : Predicate<"PPCSubTarget->isLittleEndian()">; 64def IsBigEndian : Predicate<"!PPCSubTarget->isLittleEndian()">; 65 66let Predicates = [HasVSX] in { 67let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns. 68let hasSideEffects = 0 in { // VSX instructions don't have side effects. 69let Uses = [RM] in { 70 71 // Load indexed instructions 72 let mayLoad = 1 in { 73 def LXSDX : XX1Form<31, 588, 74 (outs vsfrc:$XT), (ins memrr:$src), 75 "lxsdx $XT, $src", IIC_LdStLFD, 76 [(set f64:$XT, (load xoaddr:$src))]>; 77 78 def LXVD2X : XX1Form<31, 844, 79 (outs vsrc:$XT), (ins memrr:$src), 80 "lxvd2x $XT, $src", IIC_LdStLFD, 81 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>; 82 83 def LXVDSX : XX1Form<31, 332, 84 (outs vsrc:$XT), (ins memrr:$src), 85 "lxvdsx $XT, $src", IIC_LdStLFD, []>; 86 87 def LXVW4X : XX1Form<31, 780, 88 (outs vsrc:$XT), (ins memrr:$src), 89 "lxvw4x $XT, $src", IIC_LdStLFD, 90 [(set v4i32:$XT, (int_ppc_vsx_lxvw4x xoaddr:$src))]>; 91 } 92 93 // Store indexed instructions 94 let mayStore = 1 in { 95 def STXSDX : XX1Form<31, 716, 96 (outs), (ins vsfrc:$XT, memrr:$dst), 97 "stxsdx $XT, $dst", IIC_LdStSTFD, 98 [(store f64:$XT, xoaddr:$dst)]>; 99 100 def STXVD2X : XX1Form<31, 972, 101 (outs), (ins vsrc:$XT, memrr:$dst), 102 "stxvd2x $XT, $dst", IIC_LdStSTFD, 103 [(store v2f64:$XT, xoaddr:$dst)]>; 104 105 def STXVW4X : XX1Form<31, 908, 106 (outs), (ins vsrc:$XT, memrr:$dst), 107 "stxvw4x $XT, $dst", IIC_LdStSTFD, 108 [(store v4i32:$XT, xoaddr:$dst)]>; 109 } 110 111 // Add/Mul Instructions 112 let isCommutable = 1 in { 113 def XSADDDP : XX3Form<60, 32, 114 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 115 "xsadddp $XT, $XA, $XB", IIC_VecFP, 116 [(set f64:$XT, (fadd f64:$XA, f64:$XB))]>; 117 def XSMULDP : XX3Form<60, 48, 118 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 119 "xsmuldp $XT, $XA, $XB", IIC_VecFP, 120 [(set f64:$XT, (fmul f64:$XA, f64:$XB))]>; 121 122 def XVADDDP : XX3Form<60, 96, 123 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 124 "xvadddp $XT, $XA, $XB", IIC_VecFP, 125 [(set v2f64:$XT, (fadd v2f64:$XA, v2f64:$XB))]>; 126 127 def XVADDSP : XX3Form<60, 64, 128 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 129 "xvaddsp $XT, $XA, $XB", IIC_VecFP, 130 [(set v4f32:$XT, (fadd v4f32:$XA, v4f32:$XB))]>; 131 132 def XVMULDP : XX3Form<60, 112, 133 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 134 "xvmuldp $XT, $XA, $XB", IIC_VecFP, 135 [(set v2f64:$XT, (fmul v2f64:$XA, v2f64:$XB))]>; 136 137 def XVMULSP : XX3Form<60, 80, 138 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 139 "xvmulsp $XT, $XA, $XB", IIC_VecFP, 140 [(set v4f32:$XT, (fmul v4f32:$XA, v4f32:$XB))]>; 141 } 142 143 // Subtract Instructions 144 def XSSUBDP : XX3Form<60, 40, 145 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 146 "xssubdp $XT, $XA, $XB", IIC_VecFP, 147 [(set f64:$XT, (fsub f64:$XA, f64:$XB))]>; 148 149 def XVSUBDP : XX3Form<60, 104, 150 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 151 "xvsubdp $XT, $XA, $XB", IIC_VecFP, 152 [(set v2f64:$XT, (fsub v2f64:$XA, v2f64:$XB))]>; 153 def XVSUBSP : XX3Form<60, 72, 154 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 155 "xvsubsp $XT, $XA, $XB", IIC_VecFP, 156 [(set v4f32:$XT, (fsub v4f32:$XA, v4f32:$XB))]>; 157 158 // FMA Instructions 159 let BaseName = "XSMADDADP" in { 160 let isCommutable = 1 in 161 def XSMADDADP : XX3Form<60, 33, 162 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 163 "xsmaddadp $XT, $XA, $XB", IIC_VecFP, 164 [(set f64:$XT, (fma f64:$XA, f64:$XB, f64:$XTi))]>, 165 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 166 AltVSXFMARel; 167 let IsVSXFMAAlt = 1 in 168 def XSMADDMDP : XX3Form<60, 41, 169 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 170 "xsmaddmdp $XT, $XA, $XB", IIC_VecFP, []>, 171 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 172 AltVSXFMARel; 173 } 174 175 let BaseName = "XSMSUBADP" in { 176 let isCommutable = 1 in 177 def XSMSUBADP : XX3Form<60, 49, 178 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 179 "xsmsubadp $XT, $XA, $XB", IIC_VecFP, 180 [(set f64:$XT, (fma f64:$XA, f64:$XB, (fneg f64:$XTi)))]>, 181 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 182 AltVSXFMARel; 183 let IsVSXFMAAlt = 1 in 184 def XSMSUBMDP : XX3Form<60, 57, 185 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 186 "xsmsubmdp $XT, $XA, $XB", IIC_VecFP, []>, 187 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 188 AltVSXFMARel; 189 } 190 191 let BaseName = "XSNMADDADP" in { 192 let isCommutable = 1 in 193 def XSNMADDADP : XX3Form<60, 161, 194 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 195 "xsnmaddadp $XT, $XA, $XB", IIC_VecFP, 196 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, f64:$XTi)))]>, 197 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 198 AltVSXFMARel; 199 let IsVSXFMAAlt = 1 in 200 def XSNMADDMDP : XX3Form<60, 169, 201 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 202 "xsnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>, 203 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 204 AltVSXFMARel; 205 } 206 207 let BaseName = "XSNMSUBADP" in { 208 let isCommutable = 1 in 209 def XSNMSUBADP : XX3Form<60, 177, 210 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 211 "xsnmsubadp $XT, $XA, $XB", IIC_VecFP, 212 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, (fneg f64:$XTi))))]>, 213 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 214 AltVSXFMARel; 215 let IsVSXFMAAlt = 1 in 216 def XSNMSUBMDP : XX3Form<60, 185, 217 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB), 218 "xsnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>, 219 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 220 AltVSXFMARel; 221 } 222 223 let BaseName = "XVMADDADP" in { 224 let isCommutable = 1 in 225 def XVMADDADP : XX3Form<60, 97, 226 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 227 "xvmaddadp $XT, $XA, $XB", IIC_VecFP, 228 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>, 229 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 230 AltVSXFMARel; 231 let IsVSXFMAAlt = 1 in 232 def XVMADDMDP : XX3Form<60, 105, 233 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 234 "xvmaddmdp $XT, $XA, $XB", IIC_VecFP, []>, 235 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 236 AltVSXFMARel; 237 } 238 239 let BaseName = "XVMADDASP" in { 240 let isCommutable = 1 in 241 def XVMADDASP : XX3Form<60, 65, 242 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 243 "xvmaddasp $XT, $XA, $XB", IIC_VecFP, 244 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi))]>, 245 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 246 AltVSXFMARel; 247 let IsVSXFMAAlt = 1 in 248 def XVMADDMSP : XX3Form<60, 73, 249 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 250 "xvmaddmsp $XT, $XA, $XB", IIC_VecFP, []>, 251 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 252 AltVSXFMARel; 253 } 254 255 let BaseName = "XVMSUBADP" in { 256 let isCommutable = 1 in 257 def XVMSUBADP : XX3Form<60, 113, 258 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 259 "xvmsubadp $XT, $XA, $XB", IIC_VecFP, 260 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>, 261 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 262 AltVSXFMARel; 263 let IsVSXFMAAlt = 1 in 264 def XVMSUBMDP : XX3Form<60, 121, 265 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 266 "xvmsubmdp $XT, $XA, $XB", IIC_VecFP, []>, 267 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 268 AltVSXFMARel; 269 } 270 271 let BaseName = "XVMSUBASP" in { 272 let isCommutable = 1 in 273 def XVMSUBASP : XX3Form<60, 81, 274 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 275 "xvmsubasp $XT, $XA, $XB", IIC_VecFP, 276 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi)))]>, 277 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 278 AltVSXFMARel; 279 let IsVSXFMAAlt = 1 in 280 def XVMSUBMSP : XX3Form<60, 89, 281 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 282 "xvmsubmsp $XT, $XA, $XB", IIC_VecFP, []>, 283 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 284 AltVSXFMARel; 285 } 286 287 let BaseName = "XVNMADDADP" in { 288 let isCommutable = 1 in 289 def XVNMADDADP : XX3Form<60, 225, 290 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 291 "xvnmaddadp $XT, $XA, $XB", IIC_VecFP, 292 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>, 293 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 294 AltVSXFMARel; 295 let IsVSXFMAAlt = 1 in 296 def XVNMADDMDP : XX3Form<60, 233, 297 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 298 "xvnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>, 299 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 300 AltVSXFMARel; 301 } 302 303 let BaseName = "XVNMADDASP" in { 304 let isCommutable = 1 in 305 def XVNMADDASP : XX3Form<60, 193, 306 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 307 "xvnmaddasp $XT, $XA, $XB", IIC_VecFP, 308 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi)))]>, 309 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 310 AltVSXFMARel; 311 let IsVSXFMAAlt = 1 in 312 def XVNMADDMSP : XX3Form<60, 201, 313 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 314 "xvnmaddmsp $XT, $XA, $XB", IIC_VecFP, []>, 315 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 316 AltVSXFMARel; 317 } 318 319 let BaseName = "XVNMSUBADP" in { 320 let isCommutable = 1 in 321 def XVNMSUBADP : XX3Form<60, 241, 322 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 323 "xvnmsubadp $XT, $XA, $XB", IIC_VecFP, 324 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi))))]>, 325 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 326 AltVSXFMARel; 327 let IsVSXFMAAlt = 1 in 328 def XVNMSUBMDP : XX3Form<60, 249, 329 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 330 "xvnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>, 331 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 332 AltVSXFMARel; 333 } 334 335 let BaseName = "XVNMSUBASP" in { 336 let isCommutable = 1 in 337 def XVNMSUBASP : XX3Form<60, 209, 338 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 339 "xvnmsubasp $XT, $XA, $XB", IIC_VecFP, 340 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi))))]>, 341 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 342 AltVSXFMARel; 343 let IsVSXFMAAlt = 1 in 344 def XVNMSUBMSP : XX3Form<60, 217, 345 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB), 346 "xvnmsubmsp $XT, $XA, $XB", IIC_VecFP, []>, 347 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">, 348 AltVSXFMARel; 349 } 350 351 // Division Instructions 352 def XSDIVDP : XX3Form<60, 56, 353 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 354 "xsdivdp $XT, $XA, $XB", IIC_FPDivD, 355 [(set f64:$XT, (fdiv f64:$XA, f64:$XB))]>; 356 def XSSQRTDP : XX2Form<60, 75, 357 (outs vsfrc:$XT), (ins vsfrc:$XB), 358 "xssqrtdp $XT, $XB", IIC_FPSqrtD, 359 [(set f64:$XT, (fsqrt f64:$XB))]>; 360 361 def XSREDP : XX2Form<60, 90, 362 (outs vsfrc:$XT), (ins vsfrc:$XB), 363 "xsredp $XT, $XB", IIC_VecFP, 364 [(set f64:$XT, (PPCfre f64:$XB))]>; 365 def XSRSQRTEDP : XX2Form<60, 74, 366 (outs vsfrc:$XT), (ins vsfrc:$XB), 367 "xsrsqrtedp $XT, $XB", IIC_VecFP, 368 [(set f64:$XT, (PPCfrsqrte f64:$XB))]>; 369 370 def XSTDIVDP : XX3Form_1<60, 61, 371 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB), 372 "xstdivdp $crD, $XA, $XB", IIC_FPCompare, []>; 373 def XSTSQRTDP : XX2Form_1<60, 106, 374 (outs crrc:$crD), (ins vsfrc:$XB), 375 "xstsqrtdp $crD, $XB", IIC_FPCompare, []>; 376 377 def XVDIVDP : XX3Form<60, 120, 378 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 379 "xvdivdp $XT, $XA, $XB", IIC_FPDivD, 380 [(set v2f64:$XT, (fdiv v2f64:$XA, v2f64:$XB))]>; 381 def XVDIVSP : XX3Form<60, 88, 382 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 383 "xvdivsp $XT, $XA, $XB", IIC_FPDivS, 384 [(set v4f32:$XT, (fdiv v4f32:$XA, v4f32:$XB))]>; 385 386 def XVSQRTDP : XX2Form<60, 203, 387 (outs vsrc:$XT), (ins vsrc:$XB), 388 "xvsqrtdp $XT, $XB", IIC_FPSqrtD, 389 [(set v2f64:$XT, (fsqrt v2f64:$XB))]>; 390 def XVSQRTSP : XX2Form<60, 139, 391 (outs vsrc:$XT), (ins vsrc:$XB), 392 "xvsqrtsp $XT, $XB", IIC_FPSqrtS, 393 [(set v4f32:$XT, (fsqrt v4f32:$XB))]>; 394 395 def XVTDIVDP : XX3Form_1<60, 125, 396 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB), 397 "xvtdivdp $crD, $XA, $XB", IIC_FPCompare, []>; 398 def XVTDIVSP : XX3Form_1<60, 93, 399 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB), 400 "xvtdivsp $crD, $XA, $XB", IIC_FPCompare, []>; 401 402 def XVTSQRTDP : XX2Form_1<60, 234, 403 (outs crrc:$crD), (ins vsrc:$XB), 404 "xvtsqrtdp $crD, $XB", IIC_FPCompare, []>; 405 def XVTSQRTSP : XX2Form_1<60, 170, 406 (outs crrc:$crD), (ins vsrc:$XB), 407 "xvtsqrtsp $crD, $XB", IIC_FPCompare, []>; 408 409 def XVREDP : XX2Form<60, 218, 410 (outs vsrc:$XT), (ins vsrc:$XB), 411 "xvredp $XT, $XB", IIC_VecFP, 412 [(set v2f64:$XT, (PPCfre v2f64:$XB))]>; 413 def XVRESP : XX2Form<60, 154, 414 (outs vsrc:$XT), (ins vsrc:$XB), 415 "xvresp $XT, $XB", IIC_VecFP, 416 [(set v4f32:$XT, (PPCfre v4f32:$XB))]>; 417 418 def XVRSQRTEDP : XX2Form<60, 202, 419 (outs vsrc:$XT), (ins vsrc:$XB), 420 "xvrsqrtedp $XT, $XB", IIC_VecFP, 421 [(set v2f64:$XT, (PPCfrsqrte v2f64:$XB))]>; 422 def XVRSQRTESP : XX2Form<60, 138, 423 (outs vsrc:$XT), (ins vsrc:$XB), 424 "xvrsqrtesp $XT, $XB", IIC_VecFP, 425 [(set v4f32:$XT, (PPCfrsqrte v4f32:$XB))]>; 426 427 // Compare Instructions 428 def XSCMPODP : XX3Form_1<60, 43, 429 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB), 430 "xscmpodp $crD, $XA, $XB", IIC_FPCompare, []>; 431 def XSCMPUDP : XX3Form_1<60, 35, 432 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB), 433 "xscmpudp $crD, $XA, $XB", IIC_FPCompare, []>; 434 435 defm XVCMPEQDP : XX3Form_Rcr<60, 99, 436 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 437 "xvcmpeqdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 438 defm XVCMPEQSP : XX3Form_Rcr<60, 67, 439 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 440 "xvcmpeqsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 441 defm XVCMPGEDP : XX3Form_Rcr<60, 115, 442 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 443 "xvcmpgedp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 444 defm XVCMPGESP : XX3Form_Rcr<60, 83, 445 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 446 "xvcmpgesp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 447 defm XVCMPGTDP : XX3Form_Rcr<60, 107, 448 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 449 "xvcmpgtdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 450 defm XVCMPGTSP : XX3Form_Rcr<60, 75, 451 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 452 "xvcmpgtsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>; 453 454 // Move Instructions 455 def XSABSDP : XX2Form<60, 345, 456 (outs vsfrc:$XT), (ins vsfrc:$XB), 457 "xsabsdp $XT, $XB", IIC_VecFP, 458 [(set f64:$XT, (fabs f64:$XB))]>; 459 def XSNABSDP : XX2Form<60, 361, 460 (outs vsfrc:$XT), (ins vsfrc:$XB), 461 "xsnabsdp $XT, $XB", IIC_VecFP, 462 [(set f64:$XT, (fneg (fabs f64:$XB)))]>; 463 def XSNEGDP : XX2Form<60, 377, 464 (outs vsfrc:$XT), (ins vsfrc:$XB), 465 "xsnegdp $XT, $XB", IIC_VecFP, 466 [(set f64:$XT, (fneg f64:$XB))]>; 467 def XSCPSGNDP : XX3Form<60, 176, 468 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 469 "xscpsgndp $XT, $XA, $XB", IIC_VecFP, 470 [(set f64:$XT, (fcopysign f64:$XB, f64:$XA))]>; 471 472 def XVABSDP : XX2Form<60, 473, 473 (outs vsrc:$XT), (ins vsrc:$XB), 474 "xvabsdp $XT, $XB", IIC_VecFP, 475 [(set v2f64:$XT, (fabs v2f64:$XB))]>; 476 477 def XVABSSP : XX2Form<60, 409, 478 (outs vsrc:$XT), (ins vsrc:$XB), 479 "xvabssp $XT, $XB", IIC_VecFP, 480 [(set v4f32:$XT, (fabs v4f32:$XB))]>; 481 482 def XVCPSGNDP : XX3Form<60, 240, 483 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 484 "xvcpsgndp $XT, $XA, $XB", IIC_VecFP, 485 [(set v2f64:$XT, (fcopysign v2f64:$XB, v2f64:$XA))]>; 486 def XVCPSGNSP : XX3Form<60, 208, 487 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 488 "xvcpsgnsp $XT, $XA, $XB", IIC_VecFP, 489 [(set v4f32:$XT, (fcopysign v4f32:$XB, v4f32:$XA))]>; 490 491 def XVNABSDP : XX2Form<60, 489, 492 (outs vsrc:$XT), (ins vsrc:$XB), 493 "xvnabsdp $XT, $XB", IIC_VecFP, 494 [(set v2f64:$XT, (fneg (fabs v2f64:$XB)))]>; 495 def XVNABSSP : XX2Form<60, 425, 496 (outs vsrc:$XT), (ins vsrc:$XB), 497 "xvnabssp $XT, $XB", IIC_VecFP, 498 [(set v4f32:$XT, (fneg (fabs v4f32:$XB)))]>; 499 500 def XVNEGDP : XX2Form<60, 505, 501 (outs vsrc:$XT), (ins vsrc:$XB), 502 "xvnegdp $XT, $XB", IIC_VecFP, 503 [(set v2f64:$XT, (fneg v2f64:$XB))]>; 504 def XVNEGSP : XX2Form<60, 441, 505 (outs vsrc:$XT), (ins vsrc:$XB), 506 "xvnegsp $XT, $XB", IIC_VecFP, 507 [(set v4f32:$XT, (fneg v4f32:$XB))]>; 508 509 // Conversion Instructions 510 def XSCVDPSP : XX2Form<60, 265, 511 (outs vsfrc:$XT), (ins vsfrc:$XB), 512 "xscvdpsp $XT, $XB", IIC_VecFP, []>; 513 def XSCVDPSXDS : XX2Form<60, 344, 514 (outs vsfrc:$XT), (ins vsfrc:$XB), 515 "xscvdpsxds $XT, $XB", IIC_VecFP, 516 [(set f64:$XT, (PPCfctidz f64:$XB))]>; 517 def XSCVDPSXWS : XX2Form<60, 88, 518 (outs vsfrc:$XT), (ins vsfrc:$XB), 519 "xscvdpsxws $XT, $XB", IIC_VecFP, 520 [(set f64:$XT, (PPCfctiwz f64:$XB))]>; 521 def XSCVDPUXDS : XX2Form<60, 328, 522 (outs vsfrc:$XT), (ins vsfrc:$XB), 523 "xscvdpuxds $XT, $XB", IIC_VecFP, 524 [(set f64:$XT, (PPCfctiduz f64:$XB))]>; 525 def XSCVDPUXWS : XX2Form<60, 72, 526 (outs vsfrc:$XT), (ins vsfrc:$XB), 527 "xscvdpuxws $XT, $XB", IIC_VecFP, 528 [(set f64:$XT, (PPCfctiwuz f64:$XB))]>; 529 def XSCVSPDP : XX2Form<60, 329, 530 (outs vsfrc:$XT), (ins vsfrc:$XB), 531 "xscvspdp $XT, $XB", IIC_VecFP, []>; 532 def XSCVSXDDP : XX2Form<60, 376, 533 (outs vsfrc:$XT), (ins vsfrc:$XB), 534 "xscvsxddp $XT, $XB", IIC_VecFP, 535 [(set f64:$XT, (PPCfcfid f64:$XB))]>; 536 def XSCVUXDDP : XX2Form<60, 360, 537 (outs vsfrc:$XT), (ins vsfrc:$XB), 538 "xscvuxddp $XT, $XB", IIC_VecFP, 539 [(set f64:$XT, (PPCfcfidu f64:$XB))]>; 540 541 def XVCVDPSP : XX2Form<60, 393, 542 (outs vsrc:$XT), (ins vsrc:$XB), 543 "xvcvdpsp $XT, $XB", IIC_VecFP, []>; 544 def XVCVDPSXDS : XX2Form<60, 472, 545 (outs vsrc:$XT), (ins vsrc:$XB), 546 "xvcvdpsxds $XT, $XB", IIC_VecFP, 547 [(set v2i64:$XT, (fp_to_sint v2f64:$XB))]>; 548 def XVCVDPSXWS : XX2Form<60, 216, 549 (outs vsrc:$XT), (ins vsrc:$XB), 550 "xvcvdpsxws $XT, $XB", IIC_VecFP, []>; 551 def XVCVDPUXDS : XX2Form<60, 456, 552 (outs vsrc:$XT), (ins vsrc:$XB), 553 "xvcvdpuxds $XT, $XB", IIC_VecFP, 554 [(set v2i64:$XT, (fp_to_uint v2f64:$XB))]>; 555 def XVCVDPUXWS : XX2Form<60, 200, 556 (outs vsrc:$XT), (ins vsrc:$XB), 557 "xvcvdpuxws $XT, $XB", IIC_VecFP, []>; 558 559 def XVCVSPDP : XX2Form<60, 457, 560 (outs vsrc:$XT), (ins vsrc:$XB), 561 "xvcvspdp $XT, $XB", IIC_VecFP, []>; 562 def XVCVSPSXDS : XX2Form<60, 408, 563 (outs vsrc:$XT), (ins vsrc:$XB), 564 "xvcvspsxds $XT, $XB", IIC_VecFP, []>; 565 def XVCVSPSXWS : XX2Form<60, 152, 566 (outs vsrc:$XT), (ins vsrc:$XB), 567 "xvcvspsxws $XT, $XB", IIC_VecFP, []>; 568 def XVCVSPUXDS : XX2Form<60, 392, 569 (outs vsrc:$XT), (ins vsrc:$XB), 570 "xvcvspuxds $XT, $XB", IIC_VecFP, []>; 571 def XVCVSPUXWS : XX2Form<60, 136, 572 (outs vsrc:$XT), (ins vsrc:$XB), 573 "xvcvspuxws $XT, $XB", IIC_VecFP, []>; 574 def XVCVSXDDP : XX2Form<60, 504, 575 (outs vsrc:$XT), (ins vsrc:$XB), 576 "xvcvsxddp $XT, $XB", IIC_VecFP, 577 [(set v2f64:$XT, (sint_to_fp v2i64:$XB))]>; 578 def XVCVSXDSP : XX2Form<60, 440, 579 (outs vsrc:$XT), (ins vsrc:$XB), 580 "xvcvsxdsp $XT, $XB", IIC_VecFP, []>; 581 def XVCVSXWDP : XX2Form<60, 248, 582 (outs vsrc:$XT), (ins vsrc:$XB), 583 "xvcvsxwdp $XT, $XB", IIC_VecFP, []>; 584 def XVCVSXWSP : XX2Form<60, 184, 585 (outs vsrc:$XT), (ins vsrc:$XB), 586 "xvcvsxwsp $XT, $XB", IIC_VecFP, []>; 587 def XVCVUXDDP : XX2Form<60, 488, 588 (outs vsrc:$XT), (ins vsrc:$XB), 589 "xvcvuxddp $XT, $XB", IIC_VecFP, 590 [(set v2f64:$XT, (uint_to_fp v2i64:$XB))]>; 591 def XVCVUXDSP : XX2Form<60, 424, 592 (outs vsrc:$XT), (ins vsrc:$XB), 593 "xvcvuxdsp $XT, $XB", IIC_VecFP, []>; 594 def XVCVUXWDP : XX2Form<60, 232, 595 (outs vsrc:$XT), (ins vsrc:$XB), 596 "xvcvuxwdp $XT, $XB", IIC_VecFP, []>; 597 def XVCVUXWSP : XX2Form<60, 168, 598 (outs vsrc:$XT), (ins vsrc:$XB), 599 "xvcvuxwsp $XT, $XB", IIC_VecFP, []>; 600 601 // Rounding Instructions 602 def XSRDPI : XX2Form<60, 73, 603 (outs vsfrc:$XT), (ins vsfrc:$XB), 604 "xsrdpi $XT, $XB", IIC_VecFP, 605 [(set f64:$XT, (frnd f64:$XB))]>; 606 def XSRDPIC : XX2Form<60, 107, 607 (outs vsfrc:$XT), (ins vsfrc:$XB), 608 "xsrdpic $XT, $XB", IIC_VecFP, 609 [(set f64:$XT, (fnearbyint f64:$XB))]>; 610 def XSRDPIM : XX2Form<60, 121, 611 (outs vsfrc:$XT), (ins vsfrc:$XB), 612 "xsrdpim $XT, $XB", IIC_VecFP, 613 [(set f64:$XT, (ffloor f64:$XB))]>; 614 def XSRDPIP : XX2Form<60, 105, 615 (outs vsfrc:$XT), (ins vsfrc:$XB), 616 "xsrdpip $XT, $XB", IIC_VecFP, 617 [(set f64:$XT, (fceil f64:$XB))]>; 618 def XSRDPIZ : XX2Form<60, 89, 619 (outs vsfrc:$XT), (ins vsfrc:$XB), 620 "xsrdpiz $XT, $XB", IIC_VecFP, 621 [(set f64:$XT, (ftrunc f64:$XB))]>; 622 623 def XVRDPI : XX2Form<60, 201, 624 (outs vsrc:$XT), (ins vsrc:$XB), 625 "xvrdpi $XT, $XB", IIC_VecFP, 626 [(set v2f64:$XT, (frnd v2f64:$XB))]>; 627 def XVRDPIC : XX2Form<60, 235, 628 (outs vsrc:$XT), (ins vsrc:$XB), 629 "xvrdpic $XT, $XB", IIC_VecFP, 630 [(set v2f64:$XT, (fnearbyint v2f64:$XB))]>; 631 def XVRDPIM : XX2Form<60, 249, 632 (outs vsrc:$XT), (ins vsrc:$XB), 633 "xvrdpim $XT, $XB", IIC_VecFP, 634 [(set v2f64:$XT, (ffloor v2f64:$XB))]>; 635 def XVRDPIP : XX2Form<60, 233, 636 (outs vsrc:$XT), (ins vsrc:$XB), 637 "xvrdpip $XT, $XB", IIC_VecFP, 638 [(set v2f64:$XT, (fceil v2f64:$XB))]>; 639 def XVRDPIZ : XX2Form<60, 217, 640 (outs vsrc:$XT), (ins vsrc:$XB), 641 "xvrdpiz $XT, $XB", IIC_VecFP, 642 [(set v2f64:$XT, (ftrunc v2f64:$XB))]>; 643 644 def XVRSPI : XX2Form<60, 137, 645 (outs vsrc:$XT), (ins vsrc:$XB), 646 "xvrspi $XT, $XB", IIC_VecFP, 647 [(set v4f32:$XT, (frnd v4f32:$XB))]>; 648 def XVRSPIC : XX2Form<60, 171, 649 (outs vsrc:$XT), (ins vsrc:$XB), 650 "xvrspic $XT, $XB", IIC_VecFP, 651 [(set v4f32:$XT, (fnearbyint v4f32:$XB))]>; 652 def XVRSPIM : XX2Form<60, 185, 653 (outs vsrc:$XT), (ins vsrc:$XB), 654 "xvrspim $XT, $XB", IIC_VecFP, 655 [(set v4f32:$XT, (ffloor v4f32:$XB))]>; 656 def XVRSPIP : XX2Form<60, 169, 657 (outs vsrc:$XT), (ins vsrc:$XB), 658 "xvrspip $XT, $XB", IIC_VecFP, 659 [(set v4f32:$XT, (fceil v4f32:$XB))]>; 660 def XVRSPIZ : XX2Form<60, 153, 661 (outs vsrc:$XT), (ins vsrc:$XB), 662 "xvrspiz $XT, $XB", IIC_VecFP, 663 [(set v4f32:$XT, (ftrunc v4f32:$XB))]>; 664 665 // Max/Min Instructions 666 let isCommutable = 1 in { 667 def XSMAXDP : XX3Form<60, 160, 668 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 669 "xsmaxdp $XT, $XA, $XB", IIC_VecFP, 670 [(set vsfrc:$XT, 671 (int_ppc_vsx_xsmaxdp vsfrc:$XA, vsfrc:$XB))]>; 672 def XSMINDP : XX3Form<60, 168, 673 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 674 "xsmindp $XT, $XA, $XB", IIC_VecFP, 675 [(set vsfrc:$XT, 676 (int_ppc_vsx_xsmindp vsfrc:$XA, vsfrc:$XB))]>; 677 678 def XVMAXDP : XX3Form<60, 224, 679 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 680 "xvmaxdp $XT, $XA, $XB", IIC_VecFP, 681 [(set vsrc:$XT, 682 (int_ppc_vsx_xvmaxdp vsrc:$XA, vsrc:$XB))]>; 683 def XVMINDP : XX3Form<60, 232, 684 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 685 "xvmindp $XT, $XA, $XB", IIC_VecFP, 686 [(set vsrc:$XT, 687 (int_ppc_vsx_xvmindp vsrc:$XA, vsrc:$XB))]>; 688 689 def XVMAXSP : XX3Form<60, 192, 690 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 691 "xvmaxsp $XT, $XA, $XB", IIC_VecFP, 692 [(set vsrc:$XT, 693 (int_ppc_vsx_xvmaxsp vsrc:$XA, vsrc:$XB))]>; 694 def XVMINSP : XX3Form<60, 200, 695 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 696 "xvminsp $XT, $XA, $XB", IIC_VecFP, 697 [(set vsrc:$XT, 698 (int_ppc_vsx_xvminsp vsrc:$XA, vsrc:$XB))]>; 699 } // isCommutable 700} // Uses = [RM] 701 702 // Logical Instructions 703 let isCommutable = 1 in 704 def XXLAND : XX3Form<60, 130, 705 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 706 "xxland $XT, $XA, $XB", IIC_VecGeneral, 707 [(set v4i32:$XT, (and v4i32:$XA, v4i32:$XB))]>; 708 def XXLANDC : XX3Form<60, 138, 709 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 710 "xxlandc $XT, $XA, $XB", IIC_VecGeneral, 711 [(set v4i32:$XT, (and v4i32:$XA, 712 (vnot_ppc v4i32:$XB)))]>; 713 let isCommutable = 1 in { 714 def XXLNOR : XX3Form<60, 162, 715 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 716 "xxlnor $XT, $XA, $XB", IIC_VecGeneral, 717 [(set v4i32:$XT, (vnot_ppc (or v4i32:$XA, 718 v4i32:$XB)))]>; 719 def XXLOR : XX3Form<60, 146, 720 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 721 "xxlor $XT, $XA, $XB", IIC_VecGeneral, 722 [(set v4i32:$XT, (or v4i32:$XA, v4i32:$XB))]>; 723 let isCodeGenOnly = 1 in 724 def XXLORf: XX3Form<60, 146, 725 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB), 726 "xxlor $XT, $XA, $XB", IIC_VecGeneral, []>; 727 def XXLXOR : XX3Form<60, 154, 728 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 729 "xxlxor $XT, $XA, $XB", IIC_VecGeneral, 730 [(set v4i32:$XT, (xor v4i32:$XA, v4i32:$XB))]>; 731 } // isCommutable 732 733 // Permutation Instructions 734 def XXMRGHW : XX3Form<60, 18, 735 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 736 "xxmrghw $XT, $XA, $XB", IIC_VecPerm, []>; 737 def XXMRGLW : XX3Form<60, 50, 738 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 739 "xxmrglw $XT, $XA, $XB", IIC_VecPerm, []>; 740 741 def XXPERMDI : XX3Form_2<60, 10, 742 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$DM), 743 "xxpermdi $XT, $XA, $XB, $DM", IIC_VecPerm, []>; 744 def XXSEL : XX4Form<60, 3, 745 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, vsrc:$XC), 746 "xxsel $XT, $XA, $XB, $XC", IIC_VecPerm, []>; 747 748 def XXSLDWI : XX3Form_2<60, 2, 749 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$SHW), 750 "xxsldwi $XT, $XA, $XB, $SHW", IIC_VecPerm, []>; 751 def XXSPLTW : XX2Form_2<60, 164, 752 (outs vsrc:$XT), (ins vsrc:$XB, u2imm:$UIM), 753 "xxspltw $XT, $XB, $UIM", IIC_VecPerm, []>; 754} // hasSideEffects 755 756// SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after 757// instruction selection into a branch sequence. 758let usesCustomInserter = 1, // Expanded after instruction selection. 759 PPC970_Single = 1 in { 760 761 def SELECT_CC_VSRC: Pseudo<(outs vsrc:$dst), 762 (ins crrc:$cond, vsrc:$T, vsrc:$F, i32imm:$BROPC), 763 "#SELECT_CC_VSRC", 764 []>; 765 def SELECT_VSRC: Pseudo<(outs vsrc:$dst), 766 (ins crbitrc:$cond, vsrc:$T, vsrc:$F), 767 "#SELECT_VSRC", 768 [(set v2f64:$dst, 769 (select i1:$cond, v2f64:$T, v2f64:$F))]>; 770 def SELECT_CC_VSFRC: Pseudo<(outs f8rc:$dst), 771 (ins crrc:$cond, f8rc:$T, f8rc:$F, 772 i32imm:$BROPC), "#SELECT_CC_VSFRC", 773 []>; 774 def SELECT_VSFRC: Pseudo<(outs f8rc:$dst), 775 (ins crbitrc:$cond, f8rc:$T, f8rc:$F), 776 "#SELECT_VSFRC", 777 [(set f64:$dst, 778 (select i1:$cond, f64:$T, f64:$F))]>; 779} // usesCustomInserter 780} // AddedComplexity 781 782def : InstAlias<"xvmovdp $XT, $XB", 783 (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB)>; 784def : InstAlias<"xvmovsp $XT, $XB", 785 (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB)>; 786 787def : InstAlias<"xxspltd $XT, $XB, 0", 788 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0)>; 789def : InstAlias<"xxspltd $XT, $XB, 1", 790 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3)>; 791def : InstAlias<"xxmrghd $XT, $XA, $XB", 792 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0)>; 793def : InstAlias<"xxmrgld $XT, $XA, $XB", 794 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3)>; 795def : InstAlias<"xxswapd $XT, $XB", 796 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2)>; 797 798let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns. 799 800let Predicates = [IsBigEndian] in { 801def : Pat<(v2f64 (scalar_to_vector f64:$A)), 802 (v2f64 (SUBREG_TO_REG (i64 1), $A, sub_64))>; 803 804def : Pat<(f64 (vector_extract v2f64:$S, 0)), 805 (f64 (EXTRACT_SUBREG $S, sub_64))>; 806def : Pat<(f64 (vector_extract v2f64:$S, 1)), 807 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>; 808} 809 810let Predicates = [IsLittleEndian] in { 811def : Pat<(v2f64 (scalar_to_vector f64:$A)), 812 (v2f64 (XXPERMDI (SUBREG_TO_REG (i64 1), $A, sub_64), 813 (SUBREG_TO_REG (i64 1), $A, sub_64), 0))>; 814 815def : Pat<(f64 (vector_extract v2f64:$S, 0)), 816 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>; 817def : Pat<(f64 (vector_extract v2f64:$S, 1)), 818 (f64 (EXTRACT_SUBREG $S, sub_64))>; 819} 820 821// Additional fnmsub patterns: -a*c + b == -(a*c - b) 822def : Pat<(fma (fneg f64:$A), f64:$C, f64:$B), 823 (XSNMSUBADP $B, $C, $A)>; 824def : Pat<(fma f64:$A, (fneg f64:$C), f64:$B), 825 (XSNMSUBADP $B, $C, $A)>; 826 827def : Pat<(fma (fneg v2f64:$A), v2f64:$C, v2f64:$B), 828 (XVNMSUBADP $B, $C, $A)>; 829def : Pat<(fma v2f64:$A, (fneg v2f64:$C), v2f64:$B), 830 (XVNMSUBADP $B, $C, $A)>; 831 832def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B), 833 (XVNMSUBASP $B, $C, $A)>; 834def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B), 835 (XVNMSUBASP $B, $C, $A)>; 836 837def : Pat<(v2f64 (bitconvert v4f32:$A)), 838 (COPY_TO_REGCLASS $A, VSRC)>; 839def : Pat<(v2f64 (bitconvert v4i32:$A)), 840 (COPY_TO_REGCLASS $A, VSRC)>; 841def : Pat<(v2f64 (bitconvert v8i16:$A)), 842 (COPY_TO_REGCLASS $A, VSRC)>; 843def : Pat<(v2f64 (bitconvert v16i8:$A)), 844 (COPY_TO_REGCLASS $A, VSRC)>; 845 846def : Pat<(v4f32 (bitconvert v2f64:$A)), 847 (COPY_TO_REGCLASS $A, VRRC)>; 848def : Pat<(v4i32 (bitconvert v2f64:$A)), 849 (COPY_TO_REGCLASS $A, VRRC)>; 850def : Pat<(v8i16 (bitconvert v2f64:$A)), 851 (COPY_TO_REGCLASS $A, VRRC)>; 852def : Pat<(v16i8 (bitconvert v2f64:$A)), 853 (COPY_TO_REGCLASS $A, VRRC)>; 854 855def : Pat<(v2i64 (bitconvert v4f32:$A)), 856 (COPY_TO_REGCLASS $A, VSRC)>; 857def : Pat<(v2i64 (bitconvert v4i32:$A)), 858 (COPY_TO_REGCLASS $A, VSRC)>; 859def : Pat<(v2i64 (bitconvert v8i16:$A)), 860 (COPY_TO_REGCLASS $A, VSRC)>; 861def : Pat<(v2i64 (bitconvert v16i8:$A)), 862 (COPY_TO_REGCLASS $A, VSRC)>; 863 864def : Pat<(v4f32 (bitconvert v2i64:$A)), 865 (COPY_TO_REGCLASS $A, VRRC)>; 866def : Pat<(v4i32 (bitconvert v2i64:$A)), 867 (COPY_TO_REGCLASS $A, VRRC)>; 868def : Pat<(v8i16 (bitconvert v2i64:$A)), 869 (COPY_TO_REGCLASS $A, VRRC)>; 870def : Pat<(v16i8 (bitconvert v2i64:$A)), 871 (COPY_TO_REGCLASS $A, VRRC)>; 872 873def : Pat<(v2f64 (bitconvert v2i64:$A)), 874 (COPY_TO_REGCLASS $A, VRRC)>; 875def : Pat<(v2i64 (bitconvert v2f64:$A)), 876 (COPY_TO_REGCLASS $A, VRRC)>; 877 878// sign extension patterns 879// To extend "in place" from v2i32 to v2i64, we have input data like: 880// | undef | i32 | undef | i32 | 881// but xvcvsxwdp expects the input in big-Endian format: 882// | i32 | undef | i32 | undef | 883// so we need to shift everything to the left by one i32 (word) before 884// the conversion. 885def : Pat<(sext_inreg v2i64:$C, v2i32), 886 (XVCVDPSXDS (XVCVSXWDP (XXSLDWI $C, $C, 1)))>; 887def : Pat<(v2f64 (sint_to_fp (sext_inreg v2i64:$C, v2i32))), 888 (XVCVSXWDP (XXSLDWI $C, $C, 1))>; 889 890// Loads. 891def : Pat<(v2f64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>; 892def : Pat<(v2i64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>; 893def : Pat<(v4i32 (load xoaddr:$src)), (LXVW4X xoaddr:$src)>; 894def : Pat<(v2f64 (PPClxvd2x xoaddr:$src)), (LXVD2X xoaddr:$src)>; 895 896// Stores. 897def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, xoaddr:$dst), 898 (STXVD2X $rS, xoaddr:$dst)>; 899def : Pat<(store v2i64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>; 900def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, xoaddr:$dst), 901 (STXVW4X $rS, xoaddr:$dst)>; 902def : Pat<(PPCstxvd2x v2f64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>; 903 904// Permutes. 905def : Pat<(v2f64 (PPCxxswapd v2f64:$src)), (XXPERMDI $src, $src, 2)>; 906def : Pat<(v2i64 (PPCxxswapd v2i64:$src)), (XXPERMDI $src, $src, 2)>; 907def : Pat<(v4f32 (PPCxxswapd v4f32:$src)), (XXPERMDI $src, $src, 2)>; 908def : Pat<(v4i32 (PPCxxswapd v4i32:$src)), (XXPERMDI $src, $src, 2)>; 909 910// Selects. 911def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLT)), 912 (SELECT_VSRC (CRANDC $rhs, $lhs), $tval, $fval)>; 913def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLE)), 914 (SELECT_VSRC (CRORC $rhs, $lhs), $tval, $fval)>; 915def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETEQ)), 916 (SELECT_VSRC (CREQV $lhs, $rhs), $tval, $fval)>; 917def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGE)), 918 (SELECT_VSRC (CRORC $lhs, $rhs), $tval, $fval)>; 919def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGT)), 920 (SELECT_VSRC (CRANDC $lhs, $rhs), $tval, $fval)>; 921def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETNE)), 922 (SELECT_VSRC (CRXOR $lhs, $rhs), $tval, $fval)>; 923 924def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLT)), 925 (SELECT_VSFRC (CRANDC $rhs, $lhs), $tval, $fval)>; 926def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)), 927 (SELECT_VSFRC (CRORC $rhs, $lhs), $tval, $fval)>; 928def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETEQ)), 929 (SELECT_VSFRC (CREQV $lhs, $rhs), $tval, $fval)>; 930def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGE)), 931 (SELECT_VSFRC (CRORC $lhs, $rhs), $tval, $fval)>; 932def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGT)), 933 (SELECT_VSFRC (CRANDC $lhs, $rhs), $tval, $fval)>; 934def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETNE)), 935 (SELECT_VSFRC (CRXOR $lhs, $rhs), $tval, $fval)>; 936 937// Divides. 938def : Pat<(int_ppc_vsx_xvdivsp v4f32:$A, v4f32:$B), 939 (XVDIVSP $A, $B)>; 940def : Pat<(int_ppc_vsx_xvdivdp v2f64:$A, v2f64:$B), 941 (XVDIVDP $A, $B)>; 942 943} // AddedComplexity 944} // HasVSX 945 946// The following VSX instructions were introduced in Power ISA 2.07 947/* FIXME: if the operands are v2i64, these patterns will not match. 948 we should define new patterns or otherwise match the same patterns 949 when the elements are larger than i32. 950*/ 951def HasP8Vector : Predicate<"PPCSubTarget->hasP8Vector()">; 952def HasDirectMove : Predicate<"PPCSubTarget->hasDirectMove()">; 953let Predicates = [HasP8Vector] in { 954let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns. 955let isCommutable = 1 in { 956 def XXLEQV : XX3Form<60, 186, 957 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 958 "xxleqv $XT, $XA, $XB", IIC_VecGeneral, 959 [(set v4i32:$XT, (vnot_ppc (xor v4i32:$XA, v4i32:$XB)))]>; 960 def XXLNAND : XX3Form<60, 178, 961 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 962 "xxlnand $XT, $XA, $XB", IIC_VecGeneral, 963 [(set v4i32:$XT, (vnot_ppc (and v4i32:$XA, 964 v4i32:$XB)))]>; 965 } // isCommutable 966def XXLORC : XX3Form<60, 170, 967 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), 968 "xxlorc $XT, $XA, $XB", IIC_VecGeneral, 969 [(set v4i32:$XT, (or v4i32:$XA, (vnot_ppc v4i32:$XB)))]>; 970} // AddedComplexity = 500 971} // HasP8Vector 972 973let Predicates = [HasDirectMove, HasVSX] in { 974// VSX direct move instructions 975def MFVSRD : XX1_RS6_RD5_XO<31, 51, (outs g8rc:$rA), (ins vsfrc:$XT), 976 "mfvsrd $rA, $XT", IIC_VecGeneral, 977 [(set i64:$rA, (PPCmfvsr f64:$XT))]>, 978 Requires<[In64BitMode]>; 979def MFVSRWZ : XX1_RS6_RD5_XO<31, 115, (outs gprc:$rA), (ins vsfrc:$XT), 980 "mfvsrwz $rA, $XT", IIC_VecGeneral, 981 [(set i32:$rA, (PPCmfvsr f64:$XT))]>; 982def MTVSRD : XX1_RS6_RD5_XO<31, 179, (outs vsfrc:$XT), (ins g8rc:$rA), 983 "mtvsrd $XT, $rA", IIC_VecGeneral, 984 [(set f64:$XT, (PPCmtvsra i64:$rA))]>, 985 Requires<[In64BitMode]>; 986def MTVSRWA : XX1_RS6_RD5_XO<31, 211, (outs vsfrc:$XT), (ins gprc:$rA), 987 "mtvsrwa $XT, $rA", IIC_VecGeneral, 988 [(set f64:$XT, (PPCmtvsra i32:$rA))]>; 989def MTVSRWZ : XX1_RS6_RD5_XO<31, 243, (outs vsfrc:$XT), (ins gprc:$rA), 990 "mtvsrwz $XT, $rA", IIC_VecGeneral, 991 [(set f64:$XT, (PPCmtvsrz i32:$rA))]>; 992} // HasDirectMove, HasVSX 993