1; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-SWDIV 2; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift | FileCheck %s -check-prefix=CHECK-HWDIV 3; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4 | FileCheck %s -check-prefix=CHECK-SWDIV 4; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4f | FileCheck %s -check-prefix=CHECK-SWDIV 5; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5 | FileCheck %s -check-prefix=CHECK-HWDIV 6 7define i32 @f1(i32 %a, i32 %b) { 8entry: 9; CHECK-SWDIV: f1 10; CHECK-SWDIV: __divsi3 11 12; CHECK-HWDIV: f1 13; CHECK-HWDIV: sdiv 14 %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1] 15 ret i32 %tmp1 16} 17 18define i32 @f2(i32 %a, i32 %b) { 19entry: 20; CHECK-SWDIV: f2 21; CHECK-SWDIV: __udivsi3 22 23; CHECK-HWDIV: f2 24; CHECK-HWDIV: udiv 25 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 26 ret i32 %tmp1 27} 28 29define i32 @f3(i32 %a, i32 %b) { 30entry: 31; CHECK-SWDIV: f3 32; CHECK-SWDIV: __modsi3 33 34; CHECK-HWDIV: f3 35; CHECK-HWDIV: sdiv 36; CHECK-HWDIV: mls 37 %tmp1 = srem i32 %a, %b ; <i32> [#uses=1] 38 ret i32 %tmp1 39} 40 41define i32 @f4(i32 %a, i32 %b) { 42entry: 43; CHECK-SWDIV: f4 44; CHECK-SWDIV: __umodsi3 45 46; CHECK-HWDIV: f4 47; CHECK-HWDIV: udiv 48; CHECK-HWDIV: mls 49 %tmp1 = urem i32 %a, %b ; <i32> [#uses=1] 50 ret i32 %tmp1 51} 52 53