1; XFAIL: 2; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s 3; Generate various cmpb instruction followed by if (p0) .. if (!p0)... 4target triple = "hexagon" 5 6@Enum_global = external global i8 7 8define i32 @Func_3(i32) nounwind readnone { 9entry: 10; CHECK-NOT: mux 11 %conv = and i32 %0, 255 12 %cmp = icmp eq i32 %conv, 2 13 %selv = zext i1 %cmp to i32 14 ret i32 %selv 15} 16 17define i32 @Func_3b(i32) nounwind readonly { 18entry: 19; CHECK-NOT: mux 20 %1 = load i8, i8* @Enum_global, align 1 21 %2 = trunc i32 %0 to i8 22 %cmp = icmp ne i8 %1, %2 23 %selv = zext i1 %cmp to i32 24 ret i32 %selv 25} 26 27define i32 @Func_3c(i32) nounwind readnone { 28entry: 29; CHECK-NOT: mux 30 %conv = and i32 %0, 255 31 %cmp = icmp eq i32 %conv, 2 32 %selv = zext i1 %cmp to i32 33 ret i32 %selv 34} 35 36define i32 @Func_3d(i32) nounwind readonly { 37entry: 38; CHECK-NOT: mux 39 %1 = load i8, i8* @Enum_global, align 1 40 %2 = trunc i32 %0 to i8 41 %cmp = icmp eq i8 %1, %2 42 %selv = zext i1 %cmp to i32 43 ret i32 %selv 44} 45 46define i32 @Func_3e(i32) nounwind readonly { 47entry: 48; CHECK-NOT: mux 49 %1 = load i8, i8* @Enum_global, align 1 50 %2 = trunc i32 %0 to i8 51 %cmp = icmp eq i8 %1, %2 52 %selv = zext i1 %cmp to i32 53 ret i32 %selv 54} 55 56define i32 @Func_3f(i32) nounwind readnone { 57entry: 58; CHECK-NOT: mux 59 %conv = and i32 %0, 255 60 %cmp = icmp ugt i32 %conv, 2 61 %selv = zext i1 %cmp to i32 62 ret i32 %selv 63} 64 65define i32 @Func_3g(i32) nounwind readnone { 66entry: 67; CHECK: mux 68 %conv = and i32 %0, 255 69 %cmp = icmp ult i32 %conv, 3 70 %selv = zext i1 %cmp to i32 71 ret i32 %selv 72} 73 74define i32 @Func_3h(i32) nounwind readnone { 75entry: 76; CHECK-NOT: mux 77 %conv = and i32 %0, 254 78 %cmp = icmp ult i32 %conv, 2 79 %selv = zext i1 %cmp to i32 80 ret i32 %selv 81} 82 83define i32 @Func_3i(i32) nounwind readnone { 84entry: 85; CHECK-NOT: mux 86 %conv = and i32 %0, 254 87 %cmp = icmp ugt i32 %conv, 1 88 %selv = zext i1 %cmp to i32 89 ret i32 %selv 90} 91