1; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s 2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s 3 4; Tests for indirect addressing on SI, which is implemented using dynamic 5; indexing of vectors. 6 7; CHECK-LABEL: {{^}}extract_w_offset: 8; CHECK: s_mov_b32 m0 9; CHECK-NEXT: v_movrels_b32_e32 10define void @extract_w_offset(float addrspace(1)* %out, i32 %in) { 11entry: 12 %0 = add i32 %in, 1 13 %1 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %0 14 store float %1, float addrspace(1)* %out 15 ret void 16} 17 18; CHECK-LABEL: {{^}}extract_wo_offset: 19; CHECK: s_mov_b32 m0 20; CHECK-NEXT: v_movrels_b32_e32 21define void @extract_wo_offset(float addrspace(1)* %out, i32 %in) { 22entry: 23 %0 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %in 24 store float %0, float addrspace(1)* %out 25 ret void 26} 27 28; CHECK-LABEL: {{^}}insert_w_offset: 29; CHECK: s_mov_b32 m0 30; CHECK-NEXT: v_movreld_b32_e32 31define void @insert_w_offset(float addrspace(1)* %out, i32 %in) { 32entry: 33 %0 = add i32 %in, 1 34 %1 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %0 35 %2 = extractelement <4 x float> %1, i32 2 36 store float %2, float addrspace(1)* %out 37 ret void 38} 39 40; CHECK-LABEL: {{^}}insert_wo_offset: 41; CHECK: s_mov_b32 m0 42; CHECK-NEXT: v_movreld_b32_e32 43define void @insert_wo_offset(float addrspace(1)* %out, i32 %in) { 44entry: 45 %0 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %in 46 %1 = extractelement <4 x float> %0, i32 2 47 store float %1, float addrspace(1)* %out 48 ret void 49} 50