1; RUN: llc -march=sparc -no-integrated-as <%s | FileCheck %s 2 3; CHECK-LABEL: test_constraint_r 4; CHECK: add %o1, %o0, %o0 5define i32 @test_constraint_r(i32 %a, i32 %b) { 6entry: 7 %0 = tail call i32 asm sideeffect "add $2, $1, $0", "=r,r,r"(i32 %a, i32 %b) 8 ret i32 %0 9} 10 11; CHECK-LABEL: test_constraint_I 12; CHECK: add %o0, 1023, %o0 13define i32 @test_constraint_I(i32 %a) { 14entry: 15 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 1023) 16 ret i32 %0 17} 18 19; CHECK-LABEL: test_constraint_I_neg 20; CHECK: add %o0, -4096, %o0 21define i32 @test_constraint_I_neg(i32 %a) { 22entry: 23 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 -4096) 24 ret i32 %0 25} 26 27; CHECK-LABEL: test_constraint_I_largeimm 28; CHECK: sethi 9, [[R0:%[gilo][0-7]]] 29; CHECK: or [[R0]], 784, [[R1:%[gilo][0-7]]] 30; CHECK: add %o0, [[R1]], %o0 31define i32 @test_constraint_I_largeimm(i32 %a) { 32entry: 33 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 10000) 34 ret i32 %0 35} 36 37; CHECK-LABEL: test_constraint_reg 38; CHECK: ldda [%o1] 43, %g2 39; CHECK: ldda [%o1] 43, %g3 40define void @test_constraint_reg(i32 %s, i32* %ptr) { 41entry: 42 %0 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={r2},r,n"(i32* %ptr, i32 43) 43 %1 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={g3},r,n"(i32* %ptr, i32 43) 44 ret void 45} 46