1; RUN: llc -march=x86-64 -mtriple=x86_64-apple-darwin < %s | FileCheck %s 2 3; CHECK-LABEL: add_shl_add_constant_1_i32 4; CHECK: leal 984(%rsi,%rdi,8), %eax 5; CHECK-NEXT: retq 6define i32 @add_shl_add_constant_1_i32(i32 %x, i32 %y) nounwind { 7 %add.0 = add i32 %x, 123 8 %shl = shl i32 %add.0, 3 9 %add.1 = add i32 %shl, %y 10 ret i32 %add.1 11} 12 13; CHECK-LABEL: add_shl_add_constant_2_i32 14; CHECK: leal 984(%rsi,%rdi,8), %eax 15; CHECK-NEXT: retq 16define i32 @add_shl_add_constant_2_i32(i32 %x, i32 %y) nounwind { 17 %add.0 = add i32 %x, 123 18 %shl = shl i32 %add.0, 3 19 %add.1 = add i32 %y, %shl 20 ret i32 %add.1 21} 22 23; CHECK: LCPI2_0: 24; CHECK: .long 984 25; CHECK: _add_shl_add_constant_1_v4i32 26; CHECK: pslld $3, %[[REG:xmm[0-9]+]] 27; CHECK: paddd %xmm1, %[[REG]] 28; CHECK: paddd LCPI2_0(%rip), %[[REG:xmm[0-9]+]] 29; CHECK: retq 30define <4 x i32> @add_shl_add_constant_1_v4i32(<4 x i32> %x, <4 x i32> %y) nounwind { 31 %add.0 = add <4 x i32> %x, <i32 123, i32 123, i32 123, i32 123> 32 %shl = shl <4 x i32> %add.0, <i32 3, i32 3, i32 3, i32 3> 33 %add.1 = add <4 x i32> %shl, %y 34 ret <4 x i32> %add.1 35} 36 37; CHECK: LCPI3_0: 38; CHECK: .long 984 39; CHECK: _add_shl_add_constant_2_v4i32 40; CHECK: pslld $3, %[[REG:xmm[0-9]+]] 41; CHECK: paddd %xmm1, %[[REG]] 42; CHECK: paddd LCPI3_0(%rip), %[[REG:xmm[0-9]+]] 43; CHECK: retq 44define <4 x i32> @add_shl_add_constant_2_v4i32(<4 x i32> %x, <4 x i32> %y) nounwind { 45 %add.0 = add <4 x i32> %x, <i32 123, i32 123, i32 123, i32 123> 46 %shl = shl <4 x i32> %add.0, <i32 3, i32 3, i32 3, i32 3> 47 %add.1 = add <4 x i32> %y, %shl 48 ret <4 x i32> %add.1 49} 50