1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7
8 #include "src/assembler.h"
9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h"
11
12 namespace v8 {
13 namespace internal {
14
15 // Forward declaration.
16 class JumpTarget;
17
18 // Reserved Register Usage Summary.
19 //
20 // Registers t8, t9, and at are reserved for use by the MacroAssembler.
21 //
22 // The programmer should know that the MacroAssembler may clobber these three,
23 // but won't touch other registers except in special cases.
24 //
25 // Per the MIPS ABI, register t9 must be used for indirect function call
26 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
27 // trying to update gp register for position-independent-code. Whenever
28 // MIPS generated code calls C code, it must be via t9 register.
29
30
31 // Flags used for LeaveExitFrame function.
32 enum LeaveExitFrameMode {
33 EMIT_RETURN = true,
34 NO_EMIT_RETURN = false
35 };
36
37 // Flags used for AllocateHeapNumber
38 enum TaggingMode {
39 // Tag the result.
40 TAG_RESULT,
41 // Don't tag
42 DONT_TAG_RESULT
43 };
44
45 // Flags used for the ObjectToDoubleFPURegister function.
46 enum ObjectToDoubleFlags {
47 // No special flags.
48 NO_OBJECT_TO_DOUBLE_FLAGS = 0,
49 // Object is known to be a non smi.
50 OBJECT_NOT_SMI = 1 << 0,
51 // Don't load NaNs or infinities, branch to the non number case instead.
52 AVOID_NANS_AND_INFINITIES = 1 << 1
53 };
54
55 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
56 enum BranchDelaySlot {
57 USE_DELAY_SLOT,
58 PROTECT
59 };
60
61 // Flags used for the li macro-assembler function.
62 enum LiFlags {
63 // If the constant value can be represented in just 16 bits, then
64 // optimize the li to use a single instruction, rather than lui/ori pair.
65 OPTIMIZE_SIZE = 0,
66 // Always use 2 instructions (lui/ori pair), even if the constant could
67 // be loaded with just one, so that this value is patchable later.
68 CONSTANT_SIZE = 1
69 };
70
71
72 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
73 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
74 enum PointersToHereCheck {
75 kPointersToHereMaybeInteresting,
76 kPointersToHereAreAlwaysInteresting
77 };
78 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved };
79
80 Register GetRegisterThatIsNotOneOf(Register reg1,
81 Register reg2 = no_reg,
82 Register reg3 = no_reg,
83 Register reg4 = no_reg,
84 Register reg5 = no_reg,
85 Register reg6 = no_reg);
86
87 bool AreAliased(Register reg1,
88 Register reg2,
89 Register reg3 = no_reg,
90 Register reg4 = no_reg,
91 Register reg5 = no_reg,
92 Register reg6 = no_reg,
93 Register reg7 = no_reg,
94 Register reg8 = no_reg);
95
96
97 // -----------------------------------------------------------------------------
98 // Static helper functions.
99
ContextOperand(Register context,int index)100 inline MemOperand ContextOperand(Register context, int index) {
101 return MemOperand(context, Context::SlotOffset(index));
102 }
103
104
GlobalObjectOperand()105 inline MemOperand GlobalObjectOperand() {
106 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
107 }
108
109
110 // Generate a MemOperand for loading a field from an object.
FieldMemOperand(Register object,int offset)111 inline MemOperand FieldMemOperand(Register object, int offset) {
112 return MemOperand(object, offset - kHeapObjectTag);
113 }
114
115
116 // Generate a MemOperand for storing arguments 5..N on the stack
117 // when calling CallCFunction().
CFunctionArgumentOperand(int index)118 inline MemOperand CFunctionArgumentOperand(int index) {
119 DCHECK(index > kCArgSlotCount);
120 // Argument 5 takes the slot just past the four Arg-slots.
121 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
122 return MemOperand(sp, offset);
123 }
124
125
126 // MacroAssembler implements a collection of frequently used macros.
127 class MacroAssembler: public Assembler {
128 public:
129 // The isolate parameter can be NULL if the macro assembler should
130 // not use isolate-dependent functionality. In this case, it's the
131 // responsibility of the caller to never invoke such function on the
132 // macro assembler.
133 MacroAssembler(Isolate* isolate, void* buffer, int size);
134
135 // Arguments macros.
136 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
137 #define COND_ARGS cond, r1, r2
138
139 // Cases when relocation is not needed.
140 #define DECLARE_NORELOC_PROTOTYPE(Name, target_type) \
141 void Name(target_type target, BranchDelaySlot bd = PROTECT); \
142 inline void Name(BranchDelaySlot bd, target_type target) { \
143 Name(target, bd); \
144 } \
145 void Name(target_type target, \
146 COND_TYPED_ARGS, \
147 BranchDelaySlot bd = PROTECT); \
148 inline void Name(BranchDelaySlot bd, \
149 target_type target, \
150 COND_TYPED_ARGS) { \
151 Name(target, COND_ARGS, bd); \
152 }
153
154 #define DECLARE_BRANCH_PROTOTYPES(Name) \
155 DECLARE_NORELOC_PROTOTYPE(Name, Label*) \
156 DECLARE_NORELOC_PROTOTYPE(Name, int16_t)
157
158 DECLARE_BRANCH_PROTOTYPES(Branch)
159 DECLARE_BRANCH_PROTOTYPES(BranchAndLink)
160 DECLARE_BRANCH_PROTOTYPES(BranchShort)
161
162 #undef DECLARE_BRANCH_PROTOTYPES
163 #undef COND_TYPED_ARGS
164 #undef COND_ARGS
165
166
167 // Jump, Call, and Ret pseudo instructions implementing inter-working.
168 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
169 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
170
171 void Jump(Register target, COND_ARGS);
172 void Jump(intptr_t target, RelocInfo::Mode rmode, COND_ARGS);
173 void Jump(Address target, RelocInfo::Mode rmode, COND_ARGS);
174 void Jump(Handle<Code> code, RelocInfo::Mode rmode, COND_ARGS);
175 static int CallSize(Register target, COND_ARGS);
176 void Call(Register target, COND_ARGS);
177 static int CallSize(Address target, RelocInfo::Mode rmode, COND_ARGS);
178 void Call(Address target, RelocInfo::Mode rmode, COND_ARGS);
179 int CallSize(Handle<Code> code,
180 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
181 TypeFeedbackId ast_id = TypeFeedbackId::None(),
182 COND_ARGS);
183 void Call(Handle<Code> code,
184 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
185 TypeFeedbackId ast_id = TypeFeedbackId::None(),
186 COND_ARGS);
187 void Ret(COND_ARGS);
188 inline void Ret(BranchDelaySlot bd, Condition cond = al,
189 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
190 Ret(cond, rs, rt, bd);
191 }
192
193 void Branch(Label* L,
194 Condition cond,
195 Register rs,
196 Heap::RootListIndex index,
197 BranchDelaySlot bdslot = PROTECT);
198
199 #undef COND_ARGS
200
201 // Emit code to discard a non-negative number of pointer-sized elements
202 // from the stack, clobbering only the sp register.
203 void Drop(int count,
204 Condition cond = cc_always,
205 Register reg = no_reg,
206 const Operand& op = Operand(no_reg));
207
208 // Trivial case of DropAndRet that utilizes the delay slot and only emits
209 // 2 instructions.
210 void DropAndRet(int drop);
211
212 void DropAndRet(int drop,
213 Condition cond,
214 Register reg,
215 const Operand& op);
216
217 // Swap two registers. If the scratch register is omitted then a slightly
218 // less efficient form using xor instead of mov is emitted.
219 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
220
221 void Call(Label* target);
222
Move(Register dst,Register src)223 inline void Move(Register dst, Register src) {
224 if (!dst.is(src)) {
225 mov(dst, src);
226 }
227 }
228
Move(FPURegister dst,FPURegister src)229 inline void Move(FPURegister dst, FPURegister src) {
230 if (!dst.is(src)) {
231 mov_d(dst, src);
232 }
233 }
234
Move(Register dst_low,Register dst_high,FPURegister src)235 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
236 mfc1(dst_low, src);
237 Mfhc1(dst_high, src);
238 }
239
FmoveHigh(Register dst_high,FPURegister src)240 inline void FmoveHigh(Register dst_high, FPURegister src) {
241 Mfhc1(dst_high, src);
242 }
243
FmoveLow(Register dst_low,FPURegister src)244 inline void FmoveLow(Register dst_low, FPURegister src) {
245 mfc1(dst_low, src);
246 }
247
Move(FPURegister dst,Register src_low,Register src_high)248 inline void Move(FPURegister dst, Register src_low, Register src_high) {
249 mtc1(src_low, dst);
250 Mthc1(src_high, dst);
251 }
252
253 // Conditional move.
254 void Move(FPURegister dst, double imm);
255 void Movz(Register rd, Register rs, Register rt);
256 void Movn(Register rd, Register rs, Register rt);
257 void Movt(Register rd, Register rs, uint16_t cc = 0);
258 void Movf(Register rd, Register rs, uint16_t cc = 0);
259
260 void Clz(Register rd, Register rs);
261
262 // Jump unconditionally to given label.
263 // We NEED a nop in the branch delay slot, as it used by v8, for example in
264 // CodeGenerator::ProcessDeferred().
265 // Currently the branch delay slot is filled by the MacroAssembler.
266 // Use rather b(Label) for code generation.
jmp(Label * L)267 void jmp(Label* L) {
268 Branch(L);
269 }
270
271 void Load(Register dst, const MemOperand& src, Representation r);
272 void Store(Register src, const MemOperand& dst, Representation r);
273
274 // Load an object from the root table.
275 void LoadRoot(Register destination,
276 Heap::RootListIndex index);
277 void LoadRoot(Register destination,
278 Heap::RootListIndex index,
279 Condition cond, Register src1, const Operand& src2);
280
281 // Store an object to the root table.
282 void StoreRoot(Register source,
283 Heap::RootListIndex index);
284 void StoreRoot(Register source,
285 Heap::RootListIndex index,
286 Condition cond, Register src1, const Operand& src2);
287
288 // ---------------------------------------------------------------------------
289 // GC Support
290
291 void IncrementalMarkingRecordWriteHelper(Register object,
292 Register value,
293 Register address);
294
295 enum RememberedSetFinalAction {
296 kReturnAtEnd,
297 kFallThroughAtEnd
298 };
299
300
301 // Record in the remembered set the fact that we have a pointer to new space
302 // at the address pointed to by the addr register. Only works if addr is not
303 // in new space.
304 void RememberedSetHelper(Register object, // Used for debug code.
305 Register addr,
306 Register scratch,
307 SaveFPRegsMode save_fp,
308 RememberedSetFinalAction and_then);
309
310 void CheckPageFlag(Register object,
311 Register scratch,
312 int mask,
313 Condition cc,
314 Label* condition_met);
315
316 void CheckMapDeprecated(Handle<Map> map,
317 Register scratch,
318 Label* if_deprecated);
319
320 // Check if object is in new space. Jumps if the object is not in new space.
321 // The register scratch can be object itself, but it will be clobbered.
JumpIfNotInNewSpace(Register object,Register scratch,Label * branch)322 void JumpIfNotInNewSpace(Register object,
323 Register scratch,
324 Label* branch) {
325 InNewSpace(object, scratch, ne, branch);
326 }
327
328 // Check if object is in new space. Jumps if the object is in new space.
329 // The register scratch can be object itself, but scratch will be clobbered.
JumpIfInNewSpace(Register object,Register scratch,Label * branch)330 void JumpIfInNewSpace(Register object,
331 Register scratch,
332 Label* branch) {
333 InNewSpace(object, scratch, eq, branch);
334 }
335
336 // Check if an object has a given incremental marking color.
337 void HasColor(Register object,
338 Register scratch0,
339 Register scratch1,
340 Label* has_color,
341 int first_bit,
342 int second_bit);
343
344 void JumpIfBlack(Register object,
345 Register scratch0,
346 Register scratch1,
347 Label* on_black);
348
349 // Checks the color of an object. If the object is already grey or black
350 // then we just fall through, since it is already live. If it is white and
351 // we can determine that it doesn't need to be scanned, then we just mark it
352 // black and fall through. For the rest we jump to the label so the
353 // incremental marker can fix its assumptions.
354 void EnsureNotWhite(Register object,
355 Register scratch1,
356 Register scratch2,
357 Register scratch3,
358 Label* object_is_white_and_not_data);
359
360 // Detects conservatively whether an object is data-only, i.e. it does need to
361 // be scanned by the garbage collector.
362 void JumpIfDataObject(Register value,
363 Register scratch,
364 Label* not_data_object);
365
366 // Notify the garbage collector that we wrote a pointer into an object.
367 // |object| is the object being stored into, |value| is the object being
368 // stored. value and scratch registers are clobbered by the operation.
369 // The offset is the offset from the start of the object, not the offset from
370 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
371 void RecordWriteField(
372 Register object,
373 int offset,
374 Register value,
375 Register scratch,
376 RAStatus ra_status,
377 SaveFPRegsMode save_fp,
378 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
379 SmiCheck smi_check = INLINE_SMI_CHECK,
380 PointersToHereCheck pointers_to_here_check_for_value =
381 kPointersToHereMaybeInteresting);
382
383 // As above, but the offset has the tag presubtracted. For use with
384 // MemOperand(reg, off).
385 inline void RecordWriteContextSlot(
386 Register context,
387 int offset,
388 Register value,
389 Register scratch,
390 RAStatus ra_status,
391 SaveFPRegsMode save_fp,
392 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
393 SmiCheck smi_check = INLINE_SMI_CHECK,
394 PointersToHereCheck pointers_to_here_check_for_value =
395 kPointersToHereMaybeInteresting) {
396 RecordWriteField(context,
397 offset + kHeapObjectTag,
398 value,
399 scratch,
400 ra_status,
401 save_fp,
402 remembered_set_action,
403 smi_check,
404 pointers_to_here_check_for_value);
405 }
406
407 void RecordWriteForMap(
408 Register object,
409 Register map,
410 Register dst,
411 RAStatus ra_status,
412 SaveFPRegsMode save_fp);
413
414 // For a given |object| notify the garbage collector that the slot |address|
415 // has been written. |value| is the object being stored. The value and
416 // address registers are clobbered by the operation.
417 void RecordWrite(
418 Register object,
419 Register address,
420 Register value,
421 RAStatus ra_status,
422 SaveFPRegsMode save_fp,
423 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
424 SmiCheck smi_check = INLINE_SMI_CHECK,
425 PointersToHereCheck pointers_to_here_check_for_value =
426 kPointersToHereMaybeInteresting);
427
428
429 // ---------------------------------------------------------------------------
430 // Inline caching support.
431
432 // Generate code for checking access rights - used for security checks
433 // on access to global objects across environments. The holder register
434 // is left untouched, whereas both scratch registers are clobbered.
435 void CheckAccessGlobalProxy(Register holder_reg,
436 Register scratch,
437 Label* miss);
438
439 void GetNumberHash(Register reg0, Register scratch);
440
441 void LoadFromNumberDictionary(Label* miss,
442 Register elements,
443 Register key,
444 Register result,
445 Register reg0,
446 Register reg1,
447 Register reg2);
448
449
MarkCode(NopMarkerTypes type)450 inline void MarkCode(NopMarkerTypes type) {
451 nop(type);
452 }
453
454 // Check if the given instruction is a 'type' marker.
455 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
456 // nop(type)). These instructions are generated to mark special location in
457 // the code, like some special IC code.
IsMarkedCode(Instr instr,int type)458 static inline bool IsMarkedCode(Instr instr, int type) {
459 DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
460 return IsNop(instr, type);
461 }
462
463
GetCodeMarker(Instr instr)464 static inline int GetCodeMarker(Instr instr) {
465 uint32_t opcode = ((instr & kOpcodeMask));
466 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
467 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
468 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
469
470 // Return <n> if we have a sll zero_reg, zero_reg, n
471 // else return -1.
472 bool sllzz = (opcode == SLL &&
473 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
474 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
475 int type =
476 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
477 DCHECK((type == -1) ||
478 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
479 return type;
480 }
481
482
483
484 // ---------------------------------------------------------------------------
485 // Allocation support.
486
487 // Allocate an object in new space or old pointer space. The object_size is
488 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
489 // is passed. If the space is exhausted control continues at the gc_required
490 // label. The allocated object is returned in result. If the flag
491 // tag_allocated_object is true the result is tagged as as a heap object.
492 // All registers are clobbered also when control continues at the gc_required
493 // label.
494 void Allocate(int object_size,
495 Register result,
496 Register scratch1,
497 Register scratch2,
498 Label* gc_required,
499 AllocationFlags flags);
500
501 void Allocate(Register object_size,
502 Register result,
503 Register scratch1,
504 Register scratch2,
505 Label* gc_required,
506 AllocationFlags flags);
507
508 // Undo allocation in new space. The object passed and objects allocated after
509 // it will no longer be allocated. The caller must make sure that no pointers
510 // are left to the object(s) no longer allocated as they would be invalid when
511 // allocation is undone.
512 void UndoAllocationInNewSpace(Register object, Register scratch);
513
514
515 void AllocateTwoByteString(Register result,
516 Register length,
517 Register scratch1,
518 Register scratch2,
519 Register scratch3,
520 Label* gc_required);
521 void AllocateOneByteString(Register result, Register length,
522 Register scratch1, Register scratch2,
523 Register scratch3, Label* gc_required);
524 void AllocateTwoByteConsString(Register result,
525 Register length,
526 Register scratch1,
527 Register scratch2,
528 Label* gc_required);
529 void AllocateOneByteConsString(Register result, Register length,
530 Register scratch1, Register scratch2,
531 Label* gc_required);
532 void AllocateTwoByteSlicedString(Register result,
533 Register length,
534 Register scratch1,
535 Register scratch2,
536 Label* gc_required);
537 void AllocateOneByteSlicedString(Register result, Register length,
538 Register scratch1, Register scratch2,
539 Label* gc_required);
540
541 // Allocates a heap number or jumps to the gc_required label if the young
542 // space is full and a scavenge is needed. All registers are clobbered also
543 // when control continues at the gc_required label.
544 void AllocateHeapNumber(Register result,
545 Register scratch1,
546 Register scratch2,
547 Register heap_number_map,
548 Label* gc_required,
549 TaggingMode tagging_mode = TAG_RESULT,
550 MutableMode mode = IMMUTABLE);
551 void AllocateHeapNumberWithValue(Register result,
552 FPURegister value,
553 Register scratch1,
554 Register scratch2,
555 Label* gc_required);
556
557 // ---------------------------------------------------------------------------
558 // Instruction macros.
559
560 #define DEFINE_INSTRUCTION(instr) \
561 void instr(Register rd, Register rs, const Operand& rt); \
562 void instr(Register rd, Register rs, Register rt) { \
563 instr(rd, rs, Operand(rt)); \
564 } \
565 void instr(Register rs, Register rt, int32_t j) { \
566 instr(rs, rt, Operand(j)); \
567 }
568
569 #define DEFINE_INSTRUCTION2(instr) \
570 void instr(Register rs, const Operand& rt); \
571 void instr(Register rs, Register rt) { \
572 instr(rs, Operand(rt)); \
573 } \
574 void instr(Register rs, int32_t j) { \
575 instr(rs, Operand(j)); \
576 }
577
578 #define DEFINE_INSTRUCTION3(instr) \
579 void instr(Register rd_hi, Register rd_lo, Register rs, const Operand& rt); \
580 void instr(Register rd_hi, Register rd_lo, Register rs, Register rt) { \
581 instr(rd_hi, rd_lo, rs, Operand(rt)); \
582 } \
583 void instr(Register rd_hi, Register rd_lo, Register rs, int32_t j) { \
584 instr(rd_hi, rd_lo, rs, Operand(j)); \
585 }
586
587 DEFINE_INSTRUCTION(Addu);
588 DEFINE_INSTRUCTION(Subu);
589 DEFINE_INSTRUCTION(Mul);
590 DEFINE_INSTRUCTION(Mod);
591 DEFINE_INSTRUCTION(Mulh);
592 DEFINE_INSTRUCTION2(Mult);
593 DEFINE_INSTRUCTION2(Multu);
594 DEFINE_INSTRUCTION2(Div);
595 DEFINE_INSTRUCTION2(Divu);
596
597 DEFINE_INSTRUCTION3(Div);
598 DEFINE_INSTRUCTION3(Mul);
599
600 DEFINE_INSTRUCTION(And);
601 DEFINE_INSTRUCTION(Or);
602 DEFINE_INSTRUCTION(Xor);
603 DEFINE_INSTRUCTION(Nor);
604 DEFINE_INSTRUCTION2(Neg);
605
606 DEFINE_INSTRUCTION(Slt);
607 DEFINE_INSTRUCTION(Sltu);
608
609 // MIPS32 R2 instruction macro.
610 DEFINE_INSTRUCTION(Ror);
611
612 #undef DEFINE_INSTRUCTION
613 #undef DEFINE_INSTRUCTION2
614
615 void Pref(int32_t hint, const MemOperand& rs);
616
617
618 // ---------------------------------------------------------------------------
619 // Pseudo-instructions.
620
mov(Register rd,Register rt)621 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
622
623 void Ulw(Register rd, const MemOperand& rs);
624 void Usw(Register rd, const MemOperand& rs);
625
626 // Load int32 in the rd register.
627 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
628 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
629 li(rd, Operand(j), mode);
630 }
631 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE);
632
633 // Push multiple registers on the stack.
634 // Registers are saved in numerical order, with higher numbered registers
635 // saved in higher memory addresses.
636 void MultiPush(RegList regs);
637 void MultiPushReversed(RegList regs);
638
639 void MultiPushFPU(RegList regs);
640 void MultiPushReversedFPU(RegList regs);
641
push(Register src)642 void push(Register src) {
643 Addu(sp, sp, Operand(-kPointerSize));
644 sw(src, MemOperand(sp, 0));
645 }
Push(Register src)646 void Push(Register src) { push(src); }
647
648 // Push a handle.
649 void Push(Handle<Object> handle);
Push(Smi * smi)650 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
651
652 // Push two registers. Pushes leftmost register first (to highest address).
Push(Register src1,Register src2)653 void Push(Register src1, Register src2) {
654 Subu(sp, sp, Operand(2 * kPointerSize));
655 sw(src1, MemOperand(sp, 1 * kPointerSize));
656 sw(src2, MemOperand(sp, 0 * kPointerSize));
657 }
658
659 // Push three registers. Pushes leftmost register first (to highest address).
Push(Register src1,Register src2,Register src3)660 void Push(Register src1, Register src2, Register src3) {
661 Subu(sp, sp, Operand(3 * kPointerSize));
662 sw(src1, MemOperand(sp, 2 * kPointerSize));
663 sw(src2, MemOperand(sp, 1 * kPointerSize));
664 sw(src3, MemOperand(sp, 0 * kPointerSize));
665 }
666
667 // Push four registers. Pushes leftmost register first (to highest address).
Push(Register src1,Register src2,Register src3,Register src4)668 void Push(Register src1, Register src2, Register src3, Register src4) {
669 Subu(sp, sp, Operand(4 * kPointerSize));
670 sw(src1, MemOperand(sp, 3 * kPointerSize));
671 sw(src2, MemOperand(sp, 2 * kPointerSize));
672 sw(src3, MemOperand(sp, 1 * kPointerSize));
673 sw(src4, MemOperand(sp, 0 * kPointerSize));
674 }
675
Push(Register src,Condition cond,Register tst1,Register tst2)676 void Push(Register src, Condition cond, Register tst1, Register tst2) {
677 // Since we don't have conditional execution we use a Branch.
678 Branch(3, cond, tst1, Operand(tst2));
679 Subu(sp, sp, Operand(kPointerSize));
680 sw(src, MemOperand(sp, 0));
681 }
682
683 // Pops multiple values from the stack and load them in the
684 // registers specified in regs. Pop order is the opposite as in MultiPush.
685 void MultiPop(RegList regs);
686 void MultiPopReversed(RegList regs);
687
688 void MultiPopFPU(RegList regs);
689 void MultiPopReversedFPU(RegList regs);
690
pop(Register dst)691 void pop(Register dst) {
692 lw(dst, MemOperand(sp, 0));
693 Addu(sp, sp, Operand(kPointerSize));
694 }
Pop(Register dst)695 void Pop(Register dst) { pop(dst); }
696
697 // Pop two registers. Pops rightmost register first (from lower address).
Pop(Register src1,Register src2)698 void Pop(Register src1, Register src2) {
699 DCHECK(!src1.is(src2));
700 lw(src2, MemOperand(sp, 0 * kPointerSize));
701 lw(src1, MemOperand(sp, 1 * kPointerSize));
702 Addu(sp, sp, 2 * kPointerSize);
703 }
704
705 // Pop three registers. Pops rightmost register first (from lower address).
Pop(Register src1,Register src2,Register src3)706 void Pop(Register src1, Register src2, Register src3) {
707 lw(src3, MemOperand(sp, 0 * kPointerSize));
708 lw(src2, MemOperand(sp, 1 * kPointerSize));
709 lw(src1, MemOperand(sp, 2 * kPointerSize));
710 Addu(sp, sp, 3 * kPointerSize);
711 }
712
713 void Pop(uint32_t count = 1) {
714 Addu(sp, sp, Operand(count * kPointerSize));
715 }
716
717 // Push and pop the registers that can hold pointers, as defined by the
718 // RegList constant kSafepointSavedRegisters.
719 void PushSafepointRegisters();
720 void PopSafepointRegisters();
721 // Store value in register src in the safepoint stack slot for
722 // register dst.
723 void StoreToSafepointRegisterSlot(Register src, Register dst);
724 // Load the value of the src register from its safepoint stack slot
725 // into register dst.
726 void LoadFromSafepointRegisterSlot(Register dst, Register src);
727
728 // Flush the I-cache from asm code. You should use CpuFeatures::FlushICache
729 // from C.
730 // Does not handle errors.
731 void FlushICache(Register address, unsigned instructions);
732
733 // MIPS32 R2 instruction macro.
734 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
735 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
736
737 // ---------------------------------------------------------------------------
738 // FPU macros. These do not handle special cases like NaN or +- inf.
739
740 // Convert unsigned word to double.
741 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
742 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
743
744 // Convert double to unsigned word.
745 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
746 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
747
748 void Trunc_w_d(FPURegister fd, FPURegister fs);
749 void Round_w_d(FPURegister fd, FPURegister fs);
750 void Floor_w_d(FPURegister fd, FPURegister fs);
751 void Ceil_w_d(FPURegister fd, FPURegister fs);
752
753 // FP32 mode: Move the general purpose register into
754 // the high part of the double-register pair.
755 // FP64 mode: Move the general-purpose register into
756 // the higher 32 bits of the 64-bit coprocessor register,
757 // while leaving the low bits unchanged.
758 void Mthc1(Register rt, FPURegister fs);
759
760 // FP32 mode: move the high part of the double-register pair into
761 // general purpose register.
762 // FP64 mode: Move the higher 32 bits of the 64-bit coprocessor register into
763 // general-purpose register.
764 void Mfhc1(Register rt, FPURegister fs);
765
766 // Wrapper function for the different cmp/branch types.
767 void BranchF(Label* target,
768 Label* nan,
769 Condition cc,
770 FPURegister cmp1,
771 FPURegister cmp2,
772 BranchDelaySlot bd = PROTECT);
773
774 // Alternate (inline) version for better readability with USE_DELAY_SLOT.
BranchF(BranchDelaySlot bd,Label * target,Label * nan,Condition cc,FPURegister cmp1,FPURegister cmp2)775 inline void BranchF(BranchDelaySlot bd,
776 Label* target,
777 Label* nan,
778 Condition cc,
779 FPURegister cmp1,
780 FPURegister cmp2) {
781 BranchF(target, nan, cc, cmp1, cmp2, bd);
782 }
783
784 // Truncates a double using a specific rounding mode, and writes the value
785 // to the result register.
786 // The except_flag will contain any exceptions caused by the instruction.
787 // If check_inexact is kDontCheckForInexactConversion, then the inexact
788 // exception is masked.
789 void EmitFPUTruncate(FPURoundingMode rounding_mode,
790 Register result,
791 DoubleRegister double_input,
792 Register scratch,
793 DoubleRegister double_scratch,
794 Register except_flag,
795 CheckForInexactConversion check_inexact
796 = kDontCheckForInexactConversion);
797
798 // Performs a truncating conversion of a floating point number as used by
799 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
800 // succeeds, otherwise falls through if result is saturated. On return
801 // 'result' either holds answer, or is clobbered on fall through.
802 //
803 // Only public for the test code in test-code-stubs-arm.cc.
804 void TryInlineTruncateDoubleToI(Register result,
805 DoubleRegister input,
806 Label* done);
807
808 // Performs a truncating conversion of a floating point number as used by
809 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
810 // Exits with 'result' holding the answer.
811 void TruncateDoubleToI(Register result, DoubleRegister double_input);
812
813 // Performs a truncating conversion of a heap number as used by
814 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
815 // must be different registers. Exits with 'result' holding the answer.
816 void TruncateHeapNumberToI(Register result, Register object);
817
818 // Converts the smi or heap number in object to an int32 using the rules
819 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
820 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
821 // different registers.
822 void TruncateNumberToI(Register object,
823 Register result,
824 Register heap_number_map,
825 Register scratch,
826 Label* not_int32);
827
828 // Loads the number from object into dst register.
829 // If |object| is neither smi nor heap number, |not_number| is jumped to
830 // with |object| still intact.
831 void LoadNumber(Register object,
832 FPURegister dst,
833 Register heap_number_map,
834 Register scratch,
835 Label* not_number);
836
837 // Loads the number from object into double_dst in the double format.
838 // Control will jump to not_int32 if the value cannot be exactly represented
839 // by a 32-bit integer.
840 // Floating point value in the 32-bit integer range that are not exact integer
841 // won't be loaded.
842 void LoadNumberAsInt32Double(Register object,
843 DoubleRegister double_dst,
844 Register heap_number_map,
845 Register scratch1,
846 Register scratch2,
847 FPURegister double_scratch,
848 Label* not_int32);
849
850 // Loads the number from object into dst as a 32-bit integer.
851 // Control will jump to not_int32 if the object cannot be exactly represented
852 // by a 32-bit integer.
853 // Floating point value in the 32-bit integer range that are not exact integer
854 // won't be converted.
855 void LoadNumberAsInt32(Register object,
856 Register dst,
857 Register heap_number_map,
858 Register scratch1,
859 Register scratch2,
860 FPURegister double_scratch0,
861 FPURegister double_scratch1,
862 Label* not_int32);
863
864 // Enter exit frame.
865 // argc - argument count to be dropped by LeaveExitFrame.
866 // save_doubles - saves FPU registers on stack, currently disabled.
867 // stack_space - extra stack space.
868 void EnterExitFrame(bool save_doubles,
869 int stack_space = 0);
870
871 // Leave the current exit frame.
872 void LeaveExitFrame(bool save_doubles,
873 Register arg_count,
874 bool restore_context,
875 bool do_return = NO_EMIT_RETURN);
876
877 // Get the actual activation frame alignment for target environment.
878 static int ActivationFrameAlignment();
879
880 // Make sure the stack is aligned. Only emits code in debug mode.
881 void AssertStackIsAligned();
882
883 void LoadContext(Register dst, int context_chain_length);
884
885 // Conditionally load the cached Array transitioned map of type
886 // transitioned_kind from the native context if the map in register
887 // map_in_out is the cached Array map in the native context of
888 // expected_kind.
889 void LoadTransitionedArrayMapConditional(
890 ElementsKind expected_kind,
891 ElementsKind transitioned_kind,
892 Register map_in_out,
893 Register scratch,
894 Label* no_map_match);
895
896 void LoadGlobalFunction(int index, Register function);
897
898 // Load the initial map from the global function. The registers
899 // function and map can be the same, function is then overwritten.
900 void LoadGlobalFunctionInitialMap(Register function,
901 Register map,
902 Register scratch);
903
InitializeRootRegister()904 void InitializeRootRegister() {
905 ExternalReference roots_array_start =
906 ExternalReference::roots_array_start(isolate());
907 li(kRootRegister, Operand(roots_array_start));
908 }
909
910 // -------------------------------------------------------------------------
911 // JavaScript invokes.
912
913 // Invoke the JavaScript function code by either calling or jumping.
914 void InvokeCode(Register code,
915 const ParameterCount& expected,
916 const ParameterCount& actual,
917 InvokeFlag flag,
918 const CallWrapper& call_wrapper);
919
920 // Invoke the JavaScript function in the given register. Changes the
921 // current context to the context in the function before invoking.
922 void InvokeFunction(Register function,
923 const ParameterCount& actual,
924 InvokeFlag flag,
925 const CallWrapper& call_wrapper);
926
927 void InvokeFunction(Register function,
928 const ParameterCount& expected,
929 const ParameterCount& actual,
930 InvokeFlag flag,
931 const CallWrapper& call_wrapper);
932
933 void InvokeFunction(Handle<JSFunction> function,
934 const ParameterCount& expected,
935 const ParameterCount& actual,
936 InvokeFlag flag,
937 const CallWrapper& call_wrapper);
938
939
940 void IsObjectJSObjectType(Register heap_object,
941 Register map,
942 Register scratch,
943 Label* fail);
944
945 void IsInstanceJSObjectType(Register map,
946 Register scratch,
947 Label* fail);
948
949 void IsObjectJSStringType(Register object,
950 Register scratch,
951 Label* fail);
952
953 void IsObjectNameType(Register object,
954 Register scratch,
955 Label* fail);
956
957 // -------------------------------------------------------------------------
958 // Debugger Support.
959
960 void DebugBreak();
961
962 // -------------------------------------------------------------------------
963 // Exception handling.
964
965 // Push a new try handler and link into try handler chain.
966 void PushTryHandler(StackHandler::Kind kind, int handler_index);
967
968 // Unlink the stack handler on top of the stack from the try handler chain.
969 // Must preserve the result register.
970 void PopTryHandler();
971
972 // Passes thrown value to the handler of top of the try handler chain.
973 void Throw(Register value);
974
975 // Propagates an uncatchable exception to the top of the current JS stack's
976 // handler chain.
977 void ThrowUncatchable(Register value);
978
979 // Copies a fixed number of fields of heap objects from src to dst.
980 void CopyFields(Register dst, Register src, RegList temps, int field_count);
981
982 // Copies a number of bytes from src to dst. All registers are clobbered. On
983 // exit src and dst will point to the place just after where the last byte was
984 // read or written and length will be zero.
985 void CopyBytes(Register src,
986 Register dst,
987 Register length,
988 Register scratch);
989
990 // Initialize fields with filler values. Fields starting at |start_offset|
991 // not including end_offset are overwritten with the value in |filler|. At
992 // the end the loop, |start_offset| takes the value of |end_offset|.
993 void InitializeFieldsWithFiller(Register start_offset,
994 Register end_offset,
995 Register filler);
996
997 // -------------------------------------------------------------------------
998 // Support functions.
999
1000 // Try to get function prototype of a function and puts the value in
1001 // the result register. Checks that the function really is a
1002 // function and jumps to the miss label if the fast checks fail. The
1003 // function register will be untouched; the other registers may be
1004 // clobbered.
1005 void TryGetFunctionPrototype(Register function,
1006 Register result,
1007 Register scratch,
1008 Label* miss,
1009 bool miss_on_bound_function = false);
1010
1011 void GetObjectType(Register function,
1012 Register map,
1013 Register type_reg);
1014
1015 // Check if a map for a JSObject indicates that the object has fast elements.
1016 // Jump to the specified label if it does not.
1017 void CheckFastElements(Register map,
1018 Register scratch,
1019 Label* fail);
1020
1021 // Check if a map for a JSObject indicates that the object can have both smi
1022 // and HeapObject elements. Jump to the specified label if it does not.
1023 void CheckFastObjectElements(Register map,
1024 Register scratch,
1025 Label* fail);
1026
1027 // Check if a map for a JSObject indicates that the object has fast smi only
1028 // elements. Jump to the specified label if it does not.
1029 void CheckFastSmiElements(Register map,
1030 Register scratch,
1031 Label* fail);
1032
1033 // Check to see if maybe_number can be stored as a double in
1034 // FastDoubleElements. If it can, store it at the index specified by key in
1035 // the FastDoubleElements array elements. Otherwise jump to fail.
1036 void StoreNumberToDoubleElements(Register value_reg,
1037 Register key_reg,
1038 Register elements_reg,
1039 Register scratch1,
1040 Register scratch2,
1041 Register scratch3,
1042 Label* fail,
1043 int elements_offset = 0);
1044
1045 // Compare an object's map with the specified map and its transitioned
1046 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Jumps to
1047 // "branch_to" if the result of the comparison is "cond". If multiple map
1048 // compares are required, the compare sequences branches to early_success.
1049 void CompareMapAndBranch(Register obj,
1050 Register scratch,
1051 Handle<Map> map,
1052 Label* early_success,
1053 Condition cond,
1054 Label* branch_to);
1055
1056 // As above, but the map of the object is already loaded into the register
1057 // which is preserved by the code generated.
1058 void CompareMapAndBranch(Register obj_map,
1059 Handle<Map> map,
1060 Label* early_success,
1061 Condition cond,
1062 Label* branch_to);
1063
1064 // Check if the map of an object is equal to a specified map and branch to
1065 // label if not. Skip the smi check if not required (object is known to be a
1066 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
1067 // against maps that are ElementsKind transition maps of the specificed map.
1068 void CheckMap(Register obj,
1069 Register scratch,
1070 Handle<Map> map,
1071 Label* fail,
1072 SmiCheckType smi_check_type);
1073
1074
1075 void CheckMap(Register obj,
1076 Register scratch,
1077 Heap::RootListIndex index,
1078 Label* fail,
1079 SmiCheckType smi_check_type);
1080
1081 // Check if the map of an object is equal to a specified map and branch to a
1082 // specified target if equal. Skip the smi check if not required (object is
1083 // known to be a heap object)
1084 void DispatchMap(Register obj,
1085 Register scratch,
1086 Handle<Map> map,
1087 Handle<Code> success,
1088 SmiCheckType smi_check_type);
1089
1090
1091 // Load and check the instance type of an object for being a string.
1092 // Loads the type into the second argument register.
1093 // Returns a condition that will be enabled if the object was a string.
IsObjectStringType(Register obj,Register type,Register result)1094 Condition IsObjectStringType(Register obj,
1095 Register type,
1096 Register result) {
1097 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1098 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1099 And(type, type, Operand(kIsNotStringMask));
1100 DCHECK_EQ(0, kStringTag);
1101 return eq;
1102 }
1103
1104
1105 // Picks out an array index from the hash field.
1106 // Register use:
1107 // hash - holds the index's hash. Clobbered.
1108 // index - holds the overwritten index on exit.
1109 void IndexFromHash(Register hash, Register index);
1110
1111 // Get the number of least significant bits from a register.
1112 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
1113 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
1114
1115 // Load the value of a number object into a FPU double register. If the
1116 // object is not a number a jump to the label not_number is performed
1117 // and the FPU double register is unchanged.
1118 void ObjectToDoubleFPURegister(
1119 Register object,
1120 FPURegister value,
1121 Register scratch1,
1122 Register scratch2,
1123 Register heap_number_map,
1124 Label* not_number,
1125 ObjectToDoubleFlags flags = NO_OBJECT_TO_DOUBLE_FLAGS);
1126
1127 // Load the value of a smi object into a FPU double register. The register
1128 // scratch1 can be the same register as smi in which case smi will hold the
1129 // untagged value afterwards.
1130 void SmiToDoubleFPURegister(Register smi,
1131 FPURegister value,
1132 Register scratch1);
1133
1134 // -------------------------------------------------------------------------
1135 // Overflow handling functions.
1136 // Usage: first call the appropriate arithmetic function, then call one of the
1137 // jump functions with the overflow_dst register as the second parameter.
1138
1139 void AdduAndCheckForOverflow(Register dst,
1140 Register left,
1141 Register right,
1142 Register overflow_dst,
1143 Register scratch = at);
1144
1145 void SubuAndCheckForOverflow(Register dst,
1146 Register left,
1147 Register right,
1148 Register overflow_dst,
1149 Register scratch = at);
1150
1151 void BranchOnOverflow(Label* label,
1152 Register overflow_check,
1153 BranchDelaySlot bd = PROTECT) {
1154 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1155 }
1156
1157 void BranchOnNoOverflow(Label* label,
1158 Register overflow_check,
1159 BranchDelaySlot bd = PROTECT) {
1160 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1161 }
1162
1163 void RetOnOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1164 Ret(lt, overflow_check, Operand(zero_reg), bd);
1165 }
1166
1167 void RetOnNoOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1168 Ret(ge, overflow_check, Operand(zero_reg), bd);
1169 }
1170
1171 // -------------------------------------------------------------------------
1172 // Runtime calls.
1173
1174 // See comments at the beginning of CEntryStub::Generate.
PrepareCEntryArgs(int num_args)1175 inline void PrepareCEntryArgs(int num_args) {
1176 li(s0, num_args);
1177 li(s1, (num_args - 1) * kPointerSize);
1178 }
1179
PrepareCEntryFunction(const ExternalReference & ref)1180 inline void PrepareCEntryFunction(const ExternalReference& ref) {
1181 li(s2, Operand(ref));
1182 }
1183
1184 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
1185 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
1186
1187 // Call a code stub.
1188 void CallStub(CodeStub* stub,
1189 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1190 COND_ARGS);
1191
1192 // Tail call a code stub (jump).
1193 void TailCallStub(CodeStub* stub, COND_ARGS);
1194
1195 #undef COND_ARGS
1196
1197 void CallJSExitStub(CodeStub* stub);
1198
1199 // Call a runtime routine.
1200 void CallRuntime(const Runtime::Function* f,
1201 int num_arguments,
1202 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
CallRuntimeSaveDoubles(Runtime::FunctionId id)1203 void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
1204 const Runtime::Function* function = Runtime::FunctionForId(id);
1205 CallRuntime(function, function->nargs, kSaveFPRegs);
1206 }
1207
1208 // Convenience function: Same as above, but takes the fid instead.
1209 void CallRuntime(Runtime::FunctionId id,
1210 int num_arguments,
1211 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1212 CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
1213 }
1214
1215 // Convenience function: call an external reference.
1216 void CallExternalReference(const ExternalReference& ext,
1217 int num_arguments,
1218 BranchDelaySlot bd = PROTECT);
1219
1220 // Tail call of a runtime routine (jump).
1221 // Like JumpToExternalReference, but also takes care of passing the number
1222 // of parameters.
1223 void TailCallExternalReference(const ExternalReference& ext,
1224 int num_arguments,
1225 int result_size);
1226
1227 // Convenience function: tail call a runtime routine (jump).
1228 void TailCallRuntime(Runtime::FunctionId fid,
1229 int num_arguments,
1230 int result_size);
1231
1232 int CalculateStackPassedWords(int num_reg_arguments,
1233 int num_double_arguments);
1234
1235 // Before calling a C-function from generated code, align arguments on stack
1236 // and add space for the four mips argument slots.
1237 // After aligning the frame, non-register arguments must be stored on the
1238 // stack, after the argument-slots using helper: CFunctionArgumentOperand().
1239 // The argument count assumes all arguments are word sized.
1240 // Some compilers/platforms require the stack to be aligned when calling
1241 // C++ code.
1242 // Needs a scratch register to do some arithmetic. This register will be
1243 // trashed.
1244 void PrepareCallCFunction(int num_reg_arguments,
1245 int num_double_registers,
1246 Register scratch);
1247 void PrepareCallCFunction(int num_reg_arguments,
1248 Register scratch);
1249
1250 // Arguments 1-4 are placed in registers a0 thru a3 respectively.
1251 // Arguments 5..n are stored to stack using following:
1252 // sw(t0, CFunctionArgumentOperand(5));
1253
1254 // Calls a C function and cleans up the space for arguments allocated
1255 // by PrepareCallCFunction. The called function is not allowed to trigger a
1256 // garbage collection, since that might move the code and invalidate the
1257 // return address (unless this is somehow accounted for by the called
1258 // function).
1259 void CallCFunction(ExternalReference function, int num_arguments);
1260 void CallCFunction(Register function, int num_arguments);
1261 void CallCFunction(ExternalReference function,
1262 int num_reg_arguments,
1263 int num_double_arguments);
1264 void CallCFunction(Register function,
1265 int num_reg_arguments,
1266 int num_double_arguments);
1267 void MovFromFloatResult(DoubleRegister dst);
1268 void MovFromFloatParameter(DoubleRegister dst);
1269
1270 // There are two ways of passing double arguments on MIPS, depending on
1271 // whether soft or hard floating point ABI is used. These functions
1272 // abstract parameter passing for the three different ways we call
1273 // C functions from generated code.
1274 void MovToFloatParameter(DoubleRegister src);
1275 void MovToFloatParameters(DoubleRegister src1, DoubleRegister src2);
1276 void MovToFloatResult(DoubleRegister src);
1277
1278 // Calls an API function. Allocates HandleScope, extracts returned value
1279 // from handle and propagates exceptions. Restores context. stack_space
1280 // - space to be unwound on exit (includes the call JS arguments space and
1281 // the additional space allocated for the fast call).
1282 void CallApiFunctionAndReturn(Register function_address,
1283 ExternalReference thunk_ref,
1284 int stack_space,
1285 MemOperand return_value_operand,
1286 MemOperand* context_restore_operand);
1287
1288 // Jump to the builtin routine.
1289 void JumpToExternalReference(const ExternalReference& builtin,
1290 BranchDelaySlot bd = PROTECT);
1291
1292 // Invoke specified builtin JavaScript function. Adds an entry to
1293 // the unresolved list if the name does not resolve.
1294 void InvokeBuiltin(Builtins::JavaScript id,
1295 InvokeFlag flag,
1296 const CallWrapper& call_wrapper = NullCallWrapper());
1297
1298 // Store the code object for the given builtin in the target register and
1299 // setup the function in a1.
1300 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1301
1302 // Store the function for the given builtin in the target register.
1303 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1304
1305 struct Unresolved {
1306 int pc;
1307 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1308 const char* name;
1309 };
1310
CodeObject()1311 Handle<Object> CodeObject() {
1312 DCHECK(!code_object_.is_null());
1313 return code_object_;
1314 }
1315
1316 // Emit code for a truncating division by a constant. The dividend register is
1317 // unchanged and at gets clobbered. Dividend and result must be different.
1318 void TruncatingDiv(Register result, Register dividend, int32_t divisor);
1319
1320 // -------------------------------------------------------------------------
1321 // StatsCounter support.
1322
1323 void SetCounter(StatsCounter* counter, int value,
1324 Register scratch1, Register scratch2);
1325 void IncrementCounter(StatsCounter* counter, int value,
1326 Register scratch1, Register scratch2);
1327 void DecrementCounter(StatsCounter* counter, int value,
1328 Register scratch1, Register scratch2);
1329
1330
1331 // -------------------------------------------------------------------------
1332 // Debugging.
1333
1334 // Calls Abort(msg) if the condition cc is not satisfied.
1335 // Use --debug_code to enable.
1336 void Assert(Condition cc, BailoutReason reason, Register rs, Operand rt);
1337 void AssertFastElements(Register elements);
1338
1339 // Like Assert(), but always enabled.
1340 void Check(Condition cc, BailoutReason reason, Register rs, Operand rt);
1341
1342 // Print a message to stdout and abort execution.
1343 void Abort(BailoutReason msg);
1344
1345 // Verify restrictions about code generated in stubs.
set_generating_stub(bool value)1346 void set_generating_stub(bool value) { generating_stub_ = value; }
generating_stub()1347 bool generating_stub() { return generating_stub_; }
set_has_frame(bool value)1348 void set_has_frame(bool value) { has_frame_ = value; }
has_frame()1349 bool has_frame() { return has_frame_; }
1350 inline bool AllowThisStubCall(CodeStub* stub);
1351
1352 // ---------------------------------------------------------------------------
1353 // Number utilities.
1354
1355 // Check whether the value of reg is a power of two and not zero. If not
1356 // control continues at the label not_power_of_two. If reg is a power of two
1357 // the register scratch contains the value of (reg - 1) when control falls
1358 // through.
1359 void JumpIfNotPowerOfTwoOrZero(Register reg,
1360 Register scratch,
1361 Label* not_power_of_two_or_zero);
1362
1363 // -------------------------------------------------------------------------
1364 // Smi utilities.
1365
SmiTag(Register reg)1366 void SmiTag(Register reg) {
1367 Addu(reg, reg, reg);
1368 }
1369
1370 // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
1371 void SmiTagCheckOverflow(Register reg, Register overflow);
1372 void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
1373
SmiTag(Register dst,Register src)1374 void SmiTag(Register dst, Register src) {
1375 Addu(dst, src, src);
1376 }
1377
1378 // Try to convert int32 to smi. If the value is to large, preserve
1379 // the original value and jump to not_a_smi. Destroys scratch and
1380 // sets flags.
TrySmiTag(Register reg,Register scratch,Label * not_a_smi)1381 void TrySmiTag(Register reg, Register scratch, Label* not_a_smi) {
1382 TrySmiTag(reg, reg, scratch, not_a_smi);
1383 }
TrySmiTag(Register dst,Register src,Register scratch,Label * not_a_smi)1384 void TrySmiTag(Register dst,
1385 Register src,
1386 Register scratch,
1387 Label* not_a_smi) {
1388 SmiTagCheckOverflow(at, src, scratch);
1389 BranchOnOverflow(not_a_smi, scratch);
1390 mov(dst, at);
1391 }
1392
SmiUntag(Register reg)1393 void SmiUntag(Register reg) {
1394 sra(reg, reg, kSmiTagSize);
1395 }
1396
SmiUntag(Register dst,Register src)1397 void SmiUntag(Register dst, Register src) {
1398 sra(dst, src, kSmiTagSize);
1399 }
1400
1401 // Test if the register contains a smi.
SmiTst(Register value,Register scratch)1402 inline void SmiTst(Register value, Register scratch) {
1403 And(scratch, value, Operand(kSmiTagMask));
1404 }
NonNegativeSmiTst(Register value,Register scratch)1405 inline void NonNegativeSmiTst(Register value, Register scratch) {
1406 And(scratch, value, Operand(kSmiTagMask | kSmiSignMask));
1407 }
1408
1409 // Untag the source value into destination and jump if source is a smi.
1410 // Souce and destination can be the same register.
1411 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1412
1413 // Untag the source value into destination and jump if source is not a smi.
1414 // Souce and destination can be the same register.
1415 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1416
1417 // Jump the register contains a smi.
1418 void JumpIfSmi(Register value,
1419 Label* smi_label,
1420 Register scratch = at,
1421 BranchDelaySlot bd = PROTECT);
1422
1423 // Jump if the register contains a non-smi.
1424 void JumpIfNotSmi(Register value,
1425 Label* not_smi_label,
1426 Register scratch = at,
1427 BranchDelaySlot bd = PROTECT);
1428
1429 // Jump if either of the registers contain a non-smi.
1430 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1431 // Jump if either of the registers contain a smi.
1432 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1433
1434 // Abort execution if argument is a smi, enabled via --debug-code.
1435 void AssertNotSmi(Register object);
1436 void AssertSmi(Register object);
1437
1438 // Abort execution if argument is not a string, enabled via --debug-code.
1439 void AssertString(Register object);
1440
1441 // Abort execution if argument is not a name, enabled via --debug-code.
1442 void AssertName(Register object);
1443
1444 // Abort execution if argument is not undefined or an AllocationSite, enabled
1445 // via --debug-code.
1446 void AssertUndefinedOrAllocationSite(Register object, Register scratch);
1447
1448 // Abort execution if reg is not the root value with the given index,
1449 // enabled via --debug-code.
1450 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1451
1452 // ---------------------------------------------------------------------------
1453 // HeapNumber utilities.
1454
1455 void JumpIfNotHeapNumber(Register object,
1456 Register heap_number_map,
1457 Register scratch,
1458 Label* on_not_heap_number);
1459
1460 // -------------------------------------------------------------------------
1461 // String utilities.
1462
1463 // Generate code to do a lookup in the number string cache. If the number in
1464 // the register object is found in the cache the generated code falls through
1465 // with the result in the result register. The object and the result register
1466 // can be the same. If the number is not found in the cache the code jumps to
1467 // the label not_found with only the content of register object unchanged.
1468 void LookupNumberStringCache(Register object,
1469 Register result,
1470 Register scratch1,
1471 Register scratch2,
1472 Register scratch3,
1473 Label* not_found);
1474
1475 // Checks if both instance types are sequential ASCII strings and jumps to
1476 // label if either is not.
1477 void JumpIfBothInstanceTypesAreNotSequentialOneByte(
1478 Register first_object_instance_type, Register second_object_instance_type,
1479 Register scratch1, Register scratch2, Label* failure);
1480
1481 // Check if instance type is sequential one-byte string and jump to label if
1482 // it is not.
1483 void JumpIfInstanceTypeIsNotSequentialOneByte(Register type, Register scratch,
1484 Label* failure);
1485
1486 void JumpIfNotUniqueNameInstanceType(Register reg, Label* not_unique_name);
1487
1488 void EmitSeqStringSetCharCheck(Register string,
1489 Register index,
1490 Register value,
1491 Register scratch,
1492 uint32_t encoding_mask);
1493
1494 // Checks if both objects are sequential one-byte strings and jumps to label
1495 // if either is not. Assumes that neither object is a smi.
1496 void JumpIfNonSmisNotBothSequentialOneByteStrings(Register first,
1497 Register second,
1498 Register scratch1,
1499 Register scratch2,
1500 Label* failure);
1501
1502 // Checks if both objects are sequential one-byte strings and jumps to label
1503 // if either is not.
1504 void JumpIfNotBothSequentialOneByteStrings(Register first, Register second,
1505 Register scratch1,
1506 Register scratch2,
1507 Label* not_flat_one_byte_strings);
1508
1509 void ClampUint8(Register output_reg, Register input_reg);
1510
1511 void ClampDoubleToUint8(Register result_reg,
1512 DoubleRegister input_reg,
1513 DoubleRegister temp_double_reg);
1514
1515
1516 void LoadInstanceDescriptors(Register map, Register descriptors);
1517 void EnumLength(Register dst, Register map);
1518 void NumberOfOwnDescriptors(Register dst, Register map);
1519
1520 template<typename Field>
DecodeField(Register dst,Register src)1521 void DecodeField(Register dst, Register src) {
1522 Ext(dst, src, Field::kShift, Field::kSize);
1523 }
1524
1525 template<typename Field>
DecodeField(Register reg)1526 void DecodeField(Register reg) {
1527 DecodeField<Field>(reg, reg);
1528 }
1529
1530 template<typename Field>
DecodeFieldToSmi(Register dst,Register src)1531 void DecodeFieldToSmi(Register dst, Register src) {
1532 static const int shift = Field::kShift;
1533 static const int mask = Field::kMask >> shift << kSmiTagSize;
1534 STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
1535 STATIC_ASSERT(kSmiTag == 0);
1536 if (shift < kSmiTagSize) {
1537 sll(dst, src, kSmiTagSize - shift);
1538 And(dst, dst, Operand(mask));
1539 } else if (shift > kSmiTagSize) {
1540 srl(dst, src, shift - kSmiTagSize);
1541 And(dst, dst, Operand(mask));
1542 } else {
1543 And(dst, src, Operand(mask));
1544 }
1545 }
1546
1547 template<typename Field>
DecodeFieldToSmi(Register reg)1548 void DecodeFieldToSmi(Register reg) {
1549 DecodeField<Field>(reg, reg);
1550 }
1551
1552 // Generates function and stub prologue code.
1553 void StubPrologue();
1554 void Prologue(bool code_pre_aging);
1555
1556 // Activation support.
1557 void EnterFrame(StackFrame::Type type);
1558 void LeaveFrame(StackFrame::Type type);
1559
1560 // Patch the relocated value (lui/ori pair).
1561 void PatchRelocatedValue(Register li_location,
1562 Register scratch,
1563 Register new_value);
1564 // Get the relocatad value (loaded data) from the lui/ori pair.
1565 void GetRelocatedValue(Register li_location,
1566 Register value,
1567 Register scratch);
1568
1569 // Expects object in a0 and returns map with validated enum cache
1570 // in a0. Assumes that any other register can be used as a scratch.
1571 void CheckEnumCache(Register null_value, Label* call_runtime);
1572
1573 // AllocationMemento support. Arrays may have an associated
1574 // AllocationMemento object that can be checked for in order to pretransition
1575 // to another type.
1576 // On entry, receiver_reg should point to the array object.
1577 // scratch_reg gets clobbered.
1578 // If allocation info is present, jump to allocation_memento_present.
1579 void TestJSArrayForAllocationMemento(
1580 Register receiver_reg,
1581 Register scratch_reg,
1582 Label* no_memento_found,
1583 Condition cond = al,
1584 Label* allocation_memento_present = NULL);
1585
JumpIfJSArrayHasAllocationMemento(Register receiver_reg,Register scratch_reg,Label * memento_found)1586 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1587 Register scratch_reg,
1588 Label* memento_found) {
1589 Label no_memento_found;
1590 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1591 &no_memento_found, eq, memento_found);
1592 bind(&no_memento_found);
1593 }
1594
1595 // Jumps to found label if a prototype map has dictionary elements.
1596 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1597 Register scratch1, Label* found);
1598
1599 private:
1600 void CallCFunctionHelper(Register function,
1601 int num_reg_arguments,
1602 int num_double_arguments);
1603
1604 void BranchAndLinkShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1605 void BranchAndLinkShort(int16_t offset, Condition cond, Register rs,
1606 const Operand& rt,
1607 BranchDelaySlot bdslot = PROTECT);
1608 void BranchAndLinkShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1609 void BranchAndLinkShort(Label* L, Condition cond, Register rs,
1610 const Operand& rt,
1611 BranchDelaySlot bdslot = PROTECT);
1612 void J(Label* L, BranchDelaySlot bdslot);
1613 void Jr(Label* L, BranchDelaySlot bdslot);
1614 void Jalr(Label* L, BranchDelaySlot bdslot);
1615
1616 // Helper functions for generating invokes.
1617 void InvokePrologue(const ParameterCount& expected,
1618 const ParameterCount& actual,
1619 Handle<Code> code_constant,
1620 Register code_reg,
1621 Label* done,
1622 bool* definitely_mismatches,
1623 InvokeFlag flag,
1624 const CallWrapper& call_wrapper);
1625
1626 // Get the code for the given builtin. Returns if able to resolve
1627 // the function in the 'resolved' flag.
1628 Handle<Code> ResolveBuiltin(Builtins::JavaScript id, bool* resolved);
1629
1630 void InitializeNewString(Register string,
1631 Register length,
1632 Heap::RootListIndex map_index,
1633 Register scratch1,
1634 Register scratch2);
1635
1636 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1637 void InNewSpace(Register object,
1638 Register scratch,
1639 Condition cond, // eq for new space, ne otherwise.
1640 Label* branch);
1641
1642 // Helper for finding the mark bits for an address. Afterwards, the
1643 // bitmap register points at the word with the mark bits and the mask
1644 // the position of the first bit. Leaves addr_reg unchanged.
1645 inline void GetMarkBits(Register addr_reg,
1646 Register bitmap_reg,
1647 Register mask_reg);
1648
1649 // Helper for throwing exceptions. Compute a handler address and jump to
1650 // it. See the implementation for register usage.
1651 void JumpToHandlerEntry();
1652
1653 // Compute memory operands for safepoint stack slots.
1654 static int SafepointRegisterStackIndex(int reg_code);
1655 MemOperand SafepointRegisterSlot(Register reg);
1656 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1657
1658 bool generating_stub_;
1659 bool has_frame_;
1660 // This handle will be patched with the code object on installation.
1661 Handle<Object> code_object_;
1662
1663 // Needs access to SafepointRegisterStackIndex for compiled frame
1664 // traversal.
1665 friend class StandardFrame;
1666 };
1667
1668
1669 // The code patcher is used to patch (typically) small parts of code e.g. for
1670 // debugging and other types of instrumentation. When using the code patcher
1671 // the exact number of bytes specified must be emitted. It is not legal to emit
1672 // relocation information. If any of these constraints are violated it causes
1673 // an assertion to fail.
1674 class CodePatcher {
1675 public:
1676 enum FlushICache {
1677 FLUSH,
1678 DONT_FLUSH
1679 };
1680
1681 CodePatcher(byte* address,
1682 int instructions,
1683 FlushICache flush_cache = FLUSH);
1684 virtual ~CodePatcher();
1685
1686 // Macro assembler to emit code.
masm()1687 MacroAssembler* masm() { return &masm_; }
1688
1689 // Emit an instruction directly.
1690 void Emit(Instr instr);
1691
1692 // Emit an address directly.
1693 void Emit(Address addr);
1694
1695 // Change the condition part of an instruction leaving the rest of the current
1696 // instruction unchanged.
1697 void ChangeBranchCondition(Condition cond);
1698
1699 private:
1700 byte* address_; // The address of the code being patched.
1701 int size_; // Number of bytes of the expected patch size.
1702 MacroAssembler masm_; // Macro assembler used to generate the code.
1703 FlushICache flush_cache_; // Whether to flush the I cache after patching.
1704 };
1705
1706
1707
1708 #ifdef GENERATED_CODE_COVERAGE
1709 #define CODE_COVERAGE_STRINGIFY(x) #x
1710 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1711 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1712 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1713 #else
1714 #define ACCESS_MASM(masm) masm->
1715 #endif
1716
1717 } } // namespace v8::internal
1718
1719 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
1720