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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _MSM_MDP_H_
20 #define _MSM_MDP_H_
21 #include <linux/types.h>
22 #include <linux/fb.h>
23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24 #define MSMFB_IOCTL_MAGIC 'm'
25 #define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
26 #define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
27 #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29 #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
30 #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
31 #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
32 #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34 #define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
35 #define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
36 #define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135,   struct mdp_overlay)
37 #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137,   struct msmfb_overlay_data)
40 #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
41 #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138,   struct mdp_page_protection)
42 #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139,   struct mdp_page_protection)
43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44 #define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140,   struct mdp_overlay)
45 #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
46 #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142,   struct msmfb_overlay_blt)
47 #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49 #define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144,   struct mdp_histogram_start_req)
50 #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
51 #define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
52 #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147,   struct msmfb_overlay_3d)
53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54 #define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148,   struct msmfb_mixer_info_req)
55 #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149,   struct msmfb_overlay_data)
56 #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
57 #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59 #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
60 #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153,   struct msmfb_data)
61 #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154,   struct msmfb_data)
62 #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64 #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
65 #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
66 #define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
67 #define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 #define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
70 #define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164,   struct mdp_display_commit)
71 #define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
72 #define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167,   unsigned int)
75 #define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
76 #define FB_TYPE_3D_PANEL 0x10101010
77 #define MDP_IMGTYPE2_START 0x10000
78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79 #define MSMFB_DRIVER_VERSION 0xF9E8D701
80 enum {
81  NOTIFY_UPDATE_START,
82  NOTIFY_UPDATE_STOP,
83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84  NOTIFY_UPDATE_POWER_OFF,
85 };
86 enum {
87  NOTIFY_TYPE_NO_UPDATE,
88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  NOTIFY_TYPE_SUSPEND,
90  NOTIFY_TYPE_UPDATE,
91 };
92 enum {
93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94  MDP_RGB_565,
95  MDP_XRGB_8888,
96  MDP_Y_CBCR_H2V2,
97  MDP_Y_CBCR_H2V2_ADRENO,
98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99  MDP_ARGB_8888,
100  MDP_RGB_888,
101  MDP_Y_CRCB_H2V2,
102  MDP_YCRYCB_H2V1,
103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  MDP_CBYCRY_H2V1,
105  MDP_Y_CRCB_H2V1,
106  MDP_Y_CBCR_H2V1,
107  MDP_Y_CRCB_H1V2,
108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109  MDP_Y_CBCR_H1V2,
110  MDP_RGBA_8888,
111  MDP_BGRA_8888,
112  MDP_RGBX_8888,
113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  MDP_Y_CRCB_H2V2_TILE,
115  MDP_Y_CBCR_H2V2_TILE,
116  MDP_Y_CR_CB_H2V2,
117  MDP_Y_CR_CB_GH2V2,
118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  MDP_Y_CB_CR_H2V2,
120  MDP_Y_CRCB_H1V1,
121  MDP_Y_CBCR_H1V1,
122  MDP_YCRCB_H1V1,
123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124  MDP_YCBCR_H1V1,
125  MDP_BGR_565,
126  MDP_BGR_888,
127  MDP_Y_CBCR_H2V2_VENUS,
128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  MDP_BGRX_8888,
130  MDP_YCBYCR_H2V1,
131  MDP_IMGTYPE_LIMIT,
132  MDP_RGB_BORDERFILL,
133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134  MDP_FB_FORMAT = MDP_IMGTYPE2_START,
135  MDP_IMGTYPE_LIMIT2
136 };
137 enum {
138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139  PMEM_IMG,
140  FB_IMG,
141 };
142 enum {
143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144  HSIC_HUE = 0,
145  HSIC_SAT,
146  HSIC_INT,
147  HSIC_CON,
148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149  NUM_HSIC_PARAM,
150 };
151 #define MDSS_MDP_ROT_ONLY 0x80
152 #define MDSS_MDP_RIGHT_MIXER 0x100
153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154 #define MDSS_MDP_DUAL_PIPE 0x200
155 #define MDP_ROT_NOP 0
156 #define MDP_FLIP_LR 0x1
157 #define MDP_FLIP_UD 0x2
158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159 #define MDP_ROT_90 0x4
160 #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
161 #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
162 #define MDP_DITHER 0x8
163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164 #define MDP_BLUR 0x10
165 #define MDP_BLEND_FG_PREMULT 0x20000
166 #define MDP_IS_FG 0x40000
167 #define MDP_DEINTERLACE 0x80000000
168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 #define MDP_SHARPENING 0x40000000
170 #define MDP_NO_DMA_BARRIER_START 0x20000000
171 #define MDP_NO_DMA_BARRIER_END 0x10000000
172 #define MDP_NO_BLIT 0x08000000
173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000
175 #define MDP_BLIT_WITH_NO_DMA_BARRIERS   (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
176 #define MDP_BLIT_SRC_GEM 0x04000000
177 #define MDP_BLIT_DST_GEM 0x02000000
178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 #define MDP_BLIT_NON_CACHED 0x01000000
180 #define MDP_OV_PIPE_SHARE 0x00800000
181 #define MDP_DEINTERLACE_ODD 0x00400000
182 #define MDP_OV_PLAY_NOWAIT 0x00200000
183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 #define MDP_SOURCE_ROTATED_90 0x00100000
185 #define MDP_OVERLAY_PP_CFG_EN 0x00080000
186 #define MDP_BACKEND_COMPOSITION 0x00040000
187 #define MDP_BORDERFILL_SUPPORTED 0x00010000
188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 #define MDP_SECURE_OVERLAY_SESSION 0x00008000
190 #define MDP_OV_PIPE_FORCE_DMA 0x00004000
191 #define MDP_MEMORY_ID_TYPE_FB 0x00001000
192 #define MDP_BWC_EN 0x00000400
193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194 #define MDP_DECIMATION_EN 0x00000800
195 #define MDP_TRANSP_NOP 0xffffffff
196 #define MDP_ALPHA_NOP 0xff
197 #define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199 #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
200 #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
201 #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
202 #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204 #define MDP_FB_PAGE_PROTECTION_INVALID (5)
205 #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
206 struct mdp_rect {
207  uint32_t x;
208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209  uint32_t y;
210  uint32_t w;
211  uint32_t h;
212 };
213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214 struct mdp_img {
215  uint32_t width;
216  uint32_t height;
217  uint32_t format;
218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219  uint32_t offset;
220  int memory_id;
221  uint32_t priv;
222 };
223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224 #define MDP_CCS_RGB2YUV 0
225 #define MDP_CCS_YUV2RGB 1
226 #define MDP_CCS_SIZE 9
227 #define MDP_BV_SIZE 3
228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229 struct mdp_ccs {
230  int direction;
231  uint16_t ccs[MDP_CCS_SIZE];
232  uint16_t bv[MDP_BV_SIZE];
233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 };
235 struct mdp_csc {
236  int id;
237  uint32_t csc_mv[9];
238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239  uint32_t csc_pre_bv[3];
240  uint32_t csc_post_bv[3];
241  uint32_t csc_pre_lv[6];
242  uint32_t csc_post_lv[6];
243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244 };
245 #define MDP_BLIT_REQ_VERSION 2
246 struct mdp_blit_req {
247  struct mdp_img src;
248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249  struct mdp_img dst;
250  struct mdp_rect src_rect;
251  struct mdp_rect dst_rect;
252  uint32_t alpha;
253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254  uint32_t transp_mask;
255  uint32_t flags;
256  int sharpening_strength;
257 };
258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 struct mdp_blit_req_list {
260  uint32_t count;
261  struct mdp_blit_req req[];
262 };
263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 #define MSMFB_DATA_VERSION 2
265 struct msmfb_data {
266  uint32_t offset;
267  int memory_id;
268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269  int id;
270  uint32_t flags;
271  uint32_t priv;
272  uint32_t iova;
273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 };
275 #define MSMFB_NEW_REQUEST -1
276 struct msmfb_overlay_data {
277  uint32_t id;
278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279  struct msmfb_data data;
280  uint32_t version_key;
281  struct msmfb_data plane1_data;
282  struct msmfb_data plane2_data;
283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284  struct msmfb_data dst_data;
285 };
286 struct msmfb_img {
287  uint32_t width;
288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289  uint32_t height;
290  uint32_t format;
291 };
292 #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 struct msmfb_writeback_data {
295  struct msmfb_data buf_info;
296  struct msmfb_img img;
297 };
298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299 #define MDP_PP_OPS_ENABLE 0x1
300 #define MDP_PP_OPS_READ 0x2
301 #define MDP_PP_OPS_WRITE 0x4
302 #define MDP_PP_OPS_DISABLE 0x8
303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304 #define MDP_PP_IGC_FLAG_ROM0 0x10
305 #define MDP_PP_IGC_FLAG_ROM1 0x20
306 #define MDSS_PP_DSPP_CFG 0x000
307 #define MDSS_PP_SSPP_CFG 0x100
308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309 #define MDSS_PP_LM_CFG 0x200
310 #define MDSS_PP_WB_CFG 0x300
311 #define MDSS_PP_ARG_MASK 0x3C00
312 #define MDSS_PP_ARG_NUM 4
313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314 #define MDSS_PP_ARG_SHIFT 10
315 #define MDSS_PP_LOCATION_MASK 0x0300
316 #define MDSS_PP_LOGICAL_MASK 0x00FF
317 #define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319 #define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
320 #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
321 #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
322 struct mdp_qseed_cfg {
323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324  uint32_t table_num;
325  uint32_t ops;
326  uint32_t len;
327  uint32_t *data;
328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 };
330 struct mdp_sharp_cfg {
331  uint32_t flags;
332  uint32_t strength;
333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334  uint32_t edge_thr;
335  uint32_t smooth_thr;
336  uint32_t noise_thr;
337 };
338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339 struct mdp_qseed_cfg_data {
340  uint32_t block;
341  struct mdp_qseed_cfg qseed_data;
342 };
343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344 #define MDP_OVERLAY_PP_CSC_CFG 0x1
345 #define MDP_OVERLAY_PP_QSEED_CFG 0x2
346 #define MDP_OVERLAY_PP_PA_CFG 0x4
347 #define MDP_OVERLAY_PP_IGC_CFG 0x8
348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349 #define MDP_OVERLAY_PP_SHARP_CFG 0x10
350 #define MDP_OVERLAY_PP_HIST_CFG 0x20
351 #define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
352 #define MDP_CSC_FLAG_ENABLE 0x1
353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354 #define MDP_CSC_FLAG_YUV_IN 0x2
355 #define MDP_CSC_FLAG_YUV_OUT 0x4
356 struct mdp_csc_cfg {
357  uint32_t flags;
358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359  uint32_t csc_mv[9];
360  uint32_t csc_pre_bv[3];
361  uint32_t csc_post_bv[3];
362  uint32_t csc_pre_lv[6];
363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364  uint32_t csc_post_lv[6];
365 };
366 struct mdp_csc_cfg_data {
367  uint32_t block;
368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369  struct mdp_csc_cfg csc_data;
370 };
371 struct mdp_pa_cfg {
372  uint32_t flags;
373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374  uint32_t hue_adj;
375  uint32_t sat_adj;
376  uint32_t val_adj;
377  uint32_t cont_adj;
378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379 };
380 struct mdp_igc_lut_data {
381  uint32_t block;
382  uint32_t len, ops;
383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384  uint32_t *c0_c1_data;
385  uint32_t *c2_data;
386 };
387 struct mdp_histogram_cfg {
388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389  uint32_t ops;
390  uint32_t block;
391  uint8_t frame_cnt;
392  uint8_t bit_mask;
393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394  uint16_t num_bins;
395 };
396 struct mdp_hist_lut_data {
397  uint32_t block;
398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399  uint32_t ops;
400  uint32_t len;
401  uint32_t *data;
402 };
403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404 struct mdp_overlay_pp_params {
405  uint32_t config_ops;
406  struct mdp_csc_cfg csc_cfg;
407  struct mdp_qseed_cfg qseed_cfg[2];
408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409  struct mdp_pa_cfg pa_cfg;
410  struct mdp_igc_lut_data igc_cfg;
411  struct mdp_sharp_cfg sharp_cfg;
412  struct mdp_histogram_cfg hist_cfg;
413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414  struct mdp_hist_lut_data hist_lut_cfg;
415 };
416 enum mdss_mdp_blend_op {
417  BLEND_OP_NOT_DEFINED = 0,
418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419  BLEND_OP_OPAQUE,
420  BLEND_OP_PREMULTIPLIED,
421  BLEND_OP_COVERAGE,
422  BLEND_OP_MAX,
423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424 };
425 struct mdp_overlay {
426  struct msmfb_img src;
427  struct mdp_rect src_rect;
428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429  struct mdp_rect dst_rect;
430  uint32_t z_order;
431  uint32_t is_fg;
432  uint32_t alpha;
433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434  uint32_t blend_op;
435  uint32_t transp_mask;
436  uint32_t flags;
437  uint32_t id;
438 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
439  uint32_t user_data[7];
440  uint8_t horz_deci;
441  uint8_t vert_deci;
442  struct mdp_overlay_pp_params overlay_pp_cfg;
443 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
444 };
445 struct msmfb_overlay_3d {
446  uint32_t is_3d;
447  uint32_t width;
448 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
449  uint32_t height;
450 };
451 struct msmfb_overlay_blt {
452  uint32_t enable;
453 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
454  uint32_t offset;
455  uint32_t width;
456  uint32_t height;
457  uint32_t bpp;
458 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
459 };
460 struct mdp_histogram {
461  uint32_t frame_cnt;
462  uint32_t bin_cnt;
463 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
464  uint32_t *r;
465  uint32_t *g;
466  uint32_t *b;
467 };
468 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
469 enum {
470  DISPLAY_MISR_EDP,
471  DISPLAY_MISR_DSI0,
472  DISPLAY_MISR_DSI1,
473 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
474  DISPLAY_MISR_HDMI,
475  DISPLAY_MISR_LCDC,
476  DISPLAY_MISR_ATV,
477  DISPLAY_MISR_DSI_CMD,
478 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
479  DISPLAY_MISR_MAX
480 };
481 enum {
482  MISR_OP_NONE,
483 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
484  MISR_OP_SFM,
485  MISR_OP_MFM,
486  MISR_OP_BM,
487  MISR_OP_MAX
488 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
489 };
490 struct mdp_misr {
491  uint32_t block_id;
492  uint32_t frame_count;
493 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
494  uint32_t crc_op_mode;
495  uint32_t crc_value[32];
496 };
497 enum {
498 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
499  MDP_BLOCK_RESERVED = 0,
500  MDP_BLOCK_OVERLAY_0,
501  MDP_BLOCK_OVERLAY_1,
502  MDP_BLOCK_VG_1,
503 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
504  MDP_BLOCK_VG_2,
505  MDP_BLOCK_RGB_1,
506  MDP_BLOCK_RGB_2,
507  MDP_BLOCK_DMA_P,
508 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
509  MDP_BLOCK_DMA_S,
510  MDP_BLOCK_DMA_E,
511  MDP_BLOCK_OVERLAY_2,
512  MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
513 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
514  MDP_LOGICAL_BLOCK_DISP_1,
515  MDP_LOGICAL_BLOCK_DISP_2,
516  MDP_BLOCK_MAX,
517 };
518 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
519 struct mdp_histogram_start_req {
520  uint32_t block;
521  uint8_t frame_cnt;
522  uint8_t bit_mask;
523 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
524  uint16_t num_bins;
525 };
526 struct mdp_histogram_data {
527  uint32_t block;
528 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
529  uint32_t bin_cnt;
530  uint32_t *c0;
531  uint32_t *c1;
532  uint32_t *c2;
533 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
534  uint32_t *extra_info;
535 };
536 struct mdp_pcc_coeff {
537  uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
538 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
539 };
540 struct mdp_pcc_cfg_data {
541  uint32_t block;
542  uint32_t ops;
543 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
544  struct mdp_pcc_coeff r, g, b;
545 };
546 #define MDP_GAMUT_TABLE_NUM 8
547 enum {
548 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
549  mdp_lut_igc,
550  mdp_lut_pgc,
551  mdp_lut_hist,
552  mdp_lut_max,
553 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
554 };
555 struct mdp_ar_gc_lut_data {
556  uint32_t x_start;
557  uint32_t slope;
558 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
559  uint32_t offset;
560 };
561 struct mdp_pgc_lut_data {
562  uint32_t block;
563 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
564  uint32_t flags;
565  uint8_t num_r_stages;
566  uint8_t num_g_stages;
567  uint8_t num_b_stages;
568 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
569  struct mdp_ar_gc_lut_data *r_data;
570  struct mdp_ar_gc_lut_data *g_data;
571  struct mdp_ar_gc_lut_data *b_data;
572 };
573 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
574 struct mdp_lut_cfg_data {
575  uint32_t lut_type;
576  union {
577  struct mdp_igc_lut_data igc_lut_data;
578 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
579  struct mdp_pgc_lut_data pgc_lut_data;
580  struct mdp_hist_lut_data hist_lut_data;
581  } data;
582 };
583 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
584 struct mdp_bl_scale_data {
585  uint32_t min_lvl;
586  uint32_t scale;
587 };
588 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
589 struct mdp_pa_cfg_data {
590  uint32_t block;
591  struct mdp_pa_cfg pa_data;
592 };
593 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
594 struct mdp_dither_cfg_data {
595  uint32_t block;
596  uint32_t flags;
597  uint32_t g_y_depth;
598 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
599  uint32_t r_cr_depth;
600  uint32_t b_cb_depth;
601 };
602 struct mdp_gamut_cfg_data {
603 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
604  uint32_t block;
605  uint32_t flags;
606  uint32_t gamut_first;
607  uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
608 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
609  uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
610  uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
611  uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
612 };
613 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
614 struct mdp_calib_config_data {
615  uint32_t ops;
616  uint32_t addr;
617  uint32_t data;
618 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
619 };
620 struct mdp_calib_config_buffer {
621  uint32_t ops;
622  uint32_t size;
623 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
624  uint32_t *buffer;
625 };
626 struct mdp_calib_dcm_state {
627  uint32_t ops;
628 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
629  uint32_t dcm_state;
630 };
631 enum {
632  DCM_UNINIT,
633 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
634  DCM_UNBLANK,
635  DCM_ENTER,
636  DCM_EXIT,
637  DCM_BLANK,
638 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
639 };
640 #define MDSS_MAX_BL_BRIGHTNESS 255
641 #define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1)
642 #define MDSS_AD_MODE_AUTO_BL 0x0
643 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
644 #define MDSS_AD_MODE_AUTO_STR 0x1
645 #define MDSS_AD_MODE_TARG_STR 0x3
646 #define MDSS_AD_MODE_MAN_STR 0x7
647 #define MDSS_AD_MODE_CALIB 0xF
648 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
649 #define MDP_PP_AD_INIT 0x10
650 #define MDP_PP_AD_CFG 0x20
651 struct mdss_ad_init {
652  uint32_t asym_lut[33];
653 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
654  uint32_t color_corr_lut[33];
655  uint8_t i_control[2];
656  uint16_t black_lvl;
657  uint16_t white_lvl;
658 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
659  uint8_t var;
660  uint8_t limit_ampl;
661  uint8_t i_dither;
662  uint8_t slope_max;
663 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
664  uint8_t slope_min;
665  uint8_t dither_ctl;
666  uint8_t format;
667  uint8_t auto_size;
668 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
669  uint16_t frame_w;
670  uint16_t frame_h;
671  uint8_t logo_v;
672  uint8_t logo_h;
673 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
674  uint32_t bl_lin_len;
675  uint32_t *bl_lin;
676  uint32_t *bl_lin_inv;
677 };
678 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
679 #define MDSS_AD_BL_CTRL_MODE_EN 1
680 #define MDSS_AD_BL_CTRL_MODE_DIS 0
681 struct mdss_ad_cfg {
682  uint32_t mode;
683 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
684  uint32_t al_calib_lut[33];
685  uint16_t backlight_min;
686  uint16_t backlight_max;
687  uint16_t backlight_scale;
688 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
689  uint16_t amb_light_min;
690  uint16_t filter[2];
691  uint16_t calib[4];
692  uint8_t strength_limit;
693 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
694  uint8_t t_filter_recursion;
695  uint16_t stab_itr;
696  uint32_t bl_ctrl_mode;
697 };
698 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
699 struct mdss_ad_init_cfg {
700  uint32_t ops;
701  union {
702  struct mdss_ad_init init;
703 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
704  struct mdss_ad_cfg cfg;
705  } params;
706 };
707 struct mdss_ad_input {
708 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
709  uint32_t mode;
710  union {
711  uint32_t amb_light;
712  uint32_t strength;
713 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
714  uint32_t calib_bl;
715  } in;
716  uint32_t output;
717 };
718 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
719 #define MDSS_CALIB_MODE_BL 0x1
720 struct mdss_calib_cfg {
721  uint32_t ops;
722  uint32_t calib_mask;
723 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
724 };
725 enum {
726  mdp_op_pcc_cfg,
727  mdp_op_csc_cfg,
728 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
729  mdp_op_lut_cfg,
730  mdp_op_qseed_cfg,
731  mdp_bl_scale_cfg,
732  mdp_op_pa_cfg,
733 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
734  mdp_op_dither_cfg,
735  mdp_op_gamut_cfg,
736  mdp_op_calib_cfg,
737  mdp_op_ad_cfg,
738 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
739  mdp_op_ad_input,
740  mdp_op_calib_mode,
741  mdp_op_calib_buffer,
742  mdp_op_calib_dcm_state,
743 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
744  mdp_op_max,
745 };
746 enum {
747  WB_FORMAT_NV12,
748 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
749  WB_FORMAT_RGB_565,
750  WB_FORMAT_RGB_888,
751  WB_FORMAT_xRGB_8888,
752  WB_FORMAT_ARGB_8888,
753 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
754  WB_FORMAT_BGRA_8888,
755  WB_FORMAT_BGRX_8888,
756  WB_FORMAT_ARGB_8888_INPUT_ALPHA
757 };
758 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
759 struct msmfb_mdp_pp {
760  uint32_t op;
761  union {
762  struct mdp_pcc_cfg_data pcc_cfg_data;
763 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
764  struct mdp_csc_cfg_data csc_cfg_data;
765  struct mdp_lut_cfg_data lut_cfg_data;
766  struct mdp_qseed_cfg_data qseed_cfg_data;
767  struct mdp_bl_scale_data bl_scale_data;
768 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
769  struct mdp_pa_cfg_data pa_cfg_data;
770  struct mdp_dither_cfg_data dither_cfg_data;
771  struct mdp_gamut_cfg_data gamut_cfg_data;
772  struct mdp_calib_config_data calib_cfg;
773 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
774  struct mdss_ad_init_cfg ad_init_cfg;
775  struct mdss_calib_cfg mdss_calib_cfg;
776  struct mdss_ad_input ad_input;
777  struct mdp_calib_config_buffer calib_buffer;
778 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
779  struct mdp_calib_dcm_state calib_dcm;
780  } data;
781 };
782 #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
783 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
784 enum {
785  metadata_op_none,
786  metadata_op_base_blend,
787  metadata_op_frame_rate,
788 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
789  metadata_op_vic,
790  metadata_op_wb_format,
791  metadata_op_get_caps,
792  metadata_op_crc,
793 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
794  metadata_op_max
795 };
796 struct mdp_blend_cfg {
797  uint32_t is_premultiplied;
798 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
799 };
800 struct mdp_mixer_cfg {
801  uint32_t writeback_format;
802  uint32_t alpha;
803 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
804 };
805 struct mdss_hw_caps {
806  uint32_t mdp_rev;
807  uint8_t rgb_pipes;
808 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
809  uint8_t vig_pipes;
810  uint8_t dma_pipes;
811  uint32_t features;
812 };
813 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
814 struct msmfb_metadata {
815  uint32_t op;
816  uint32_t flags;
817  union {
818 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
819  struct mdp_misr misr_request;
820  struct mdp_blend_cfg blend_cfg;
821  struct mdp_mixer_cfg mixer_cfg;
822  uint32_t panel_frame_rate;
823 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
824  uint32_t video_info_code;
825  struct mdss_hw_caps caps;
826  } data;
827 };
828 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
829 #define MDP_MAX_FENCE_FD 32
830 #define MDP_BUF_SYNC_FLAG_WAIT 1
831 struct mdp_buf_sync {
832  uint32_t flags;
833 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
834  uint32_t acq_fen_fd_cnt;
835  uint32_t session_id;
836  int *acq_fen_fd;
837  int *rel_fen_fd;
838 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
839  int *retire_fen_fd;
840 };
841 struct mdp_async_blit_req_list {
842  struct mdp_buf_sync sync;
843 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
844  uint32_t count;
845  struct mdp_blit_req req[];
846 };
847 #define MDP_DISPLAY_COMMIT_OVERLAY 1
848 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
849 struct mdp_display_commit {
850  uint32_t flags;
851  uint32_t wait_for_finish;
852  struct fb_var_screeninfo var;
853 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
854 };
855 struct mdp_page_protection {
856  uint32_t page_protection;
857 };
858 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
859 struct mdp_mixer_info {
860  int pndx;
861  int pnum;
862  int ptype;
863 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
864  int mixer_num;
865  int z_order;
866 };
867 #define MAX_PIPE_PER_MIXER 4
868 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
869 struct msmfb_mixer_info_req {
870  int mixer_num;
871  int cnt;
872  struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
873 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
874 };
875 enum {
876  DISPLAY_SUBSYSTEM_ID,
877  ROTATOR_SUBSYSTEM_ID,
878 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
879 };
880 enum {
881  MDP_IOMMU_DOMAIN_CP,
882  MDP_IOMMU_DOMAIN_NS,
883 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
884 };
885 enum {
886  MDP_WRITEBACK_MIRROR_OFF,
887  MDP_WRITEBACK_MIRROR_ON,
888 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
889  MDP_WRITEBACK_MIRROR_PAUSE,
890  MDP_WRITEBACK_MIRROR_RESUME,
891 };
892 #endif
893 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
894 
895