Lines Matching refs:SimpleTy
287 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1094 switch (RetVT.SimpleTy) { in emitAddSub()
1113 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1413 switch (VT.SimpleTy) { in emitCmp()
1603 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1625 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1676 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1783 switch (VT.SimpleTy) { in emitLoad()
2034 switch (VT.SimpleTy) { in emitStore()
2564 switch (VT.SimpleTy) { in selectSelect()
2827 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments()
3441 switch (VT.SimpleTy) { in fastLowerIntrinsicCall()
3771 switch (DestVT.SimpleTy) { in selectTrunc()
3838 switch (RetVT.SimpleTy) { in emitMul_rr()
3880 switch (RetVT.SimpleTy) { in emitLSL_rr()
3904 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSL_ri()
3968 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSL_ri()
3986 switch (RetVT.SimpleTy) { in emitLSR_rr()
4011 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSR_ri()
4089 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSR_ri()
4107 switch (RetVT.SimpleTy) { in emitASR_rr()
4132 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitASR_ri()
4198 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitASR_ri()
4228 switch (SrcVT.SimpleTy) { in emitIntExt()
4656 switch (RetVT.SimpleTy) { in selectBitCast()
4682 switch (RetVT.SimpleTy) { in selectFRem()