| /external/pdfium/core/src/fpdfapi/fpdf_page/ |
| D | pageint.h | 153 struct OpCode { struct
157 static const OpCode g_OpCodes[]; argument
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 80 unsigned OpCode = CE->getOpcode(); in createReplacementInstr() local
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| D | XCoreRegisterInfo.cpp | 169 unsigned OpCode = MI.getOpcode(); in InsertSPConstInst() local
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| /external/nanohttpd/websocket/src/main/java/fi/iki/elonen/ |
| D | NanoWSD.java | 384 public static enum OpCode { enum in NanoWSD.WebSocketFrame
403 private OpCode(int code) { in OpCode() method in NanoWSD.WebSocketFrame.OpCode
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| /external/llvm/lib/IR/ |
| D | Instruction.cpp | 195 const char *Instruction::getOpcodeName(unsigned OpCode) { in getOpcodeName()
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.cpp | 586 unsigned OpCode, Flags = 0; in parse() local
769 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) { in parseInstruction()
1750 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) { in parseInstrName()
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| /external/llvm/bindings/python/llvm/ |
| D | core.py | 82 class OpCode(LLVMEnumeration): class
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 746 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL; in insertSelect() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 946 unsigned OpCode = (RISBG.Mask == 0xff ? SystemZ::LLGCR : SystemZ::LLGHR); in tryRISBGZero() local
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| /external/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1106 const unsigned OpCode = DU.NarrowUse->getOpcode(); in getExtendedOperandRecurrence() local
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstructionCombining.cpp | 406 static Value *getIdentityValue(Instruction::BinaryOps OpCode, Value *V) { in getIdentityValue()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 858 int OpCode = doesNotReturn ? HexagonISD::CALLv3nr : HexagonISD::CALLv3; in LowerCall() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 2301 void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) { in visitBinary()
2448 ISD::NodeType OpCode = Cond.getValueType().isVector() ? in visitSelect() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2518 unsigned OpCode = 0; in expandBranchImm() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 7452 unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in lowerVectorShuffleAsShift() local
17552 unsigned OpCode = ((MOV64ri | N86R11) << 8) | REX_WB; // movabsq r11 in LowerINIT_TRAMPOLINE() local
19536 auto GetShift = [&](unsigned OpCode, SDValue V, int Shifter) { in LowerVectorCTPOPBitmath()
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| /external/llvm/lib/Analysis/ |
| D | ScalarEvolution.cpp | 5724 Instruction::BinaryOps OpCode; in computeShiftCompareExitLimit() local
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| /external/mesa3d/src/mesa/main/ |
| D | dlist.c | 493 } OpCode; typedef
|