| /external/llvm/lib/Target/Mips/ |
| D | MipsCCState.cpp | 87 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()
100 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
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| D | MipsCCState.h | 73 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
110 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
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| D | MipsISelLowering.cpp | 2576 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
3102 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
3133 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| D | MipsFastISel.cpp | 1438 SmallVector<ISD::OutputArg, 4> Outs; in selectRet() local
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| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 89 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
103 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
121 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
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| D | TargetLoweringBase.cpp | 1455 SmallVectorImpl<ISD::OutputArg> &Outs, in GetReturnInfo()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZCallingConv.h | 58 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
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| D | SystemZISelLowering.cpp | 794 static void VerifyVectorTypes(const SmallVectorImpl<ISD::OutputArg> &Outs) { in VerifyVectorTypes()
1011 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1177 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
1191 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 346 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
463 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
471 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 265 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs()
350 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult()
394 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
523 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
578 &Outs, in LowerCCCCallTo()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 258 auto &Outs = CLI.Outs; in LowerCall() local
389 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUISelLowering.cpp | 68 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1048 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1125 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCCCCallTo()
1454 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
1468 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 93 SmallVector<ISD::OutputArg, 4> Outs; in set() local
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| D | FastISel.cpp | 916 SmallVector<ISD::OutputArg, 4> Outs; in lowerCallTo() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 196 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
207 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn_32()
292 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn_64()
739 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall_32() local
1065 ArrayRef<ISD::OutputArg> Outs) { in fixupVariableFloatArgs()
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| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 366 SmallVectorImpl<MachineInstr*> &Outs) { in elideCopiesAndPHIs()
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| D | ARMFastISel.cpp | 2091 SmallVector<ISD::OutputArg, 4> Outs; in SelectRet() local
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| D | ARMISelLowering.cpp | 1559 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
2080 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
2219 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
2263 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 900 const SmallVectorImpl<ISD::OutputArg> &Outs, unsigned retAlignment, in getPrototype()
1056 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
2357 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 559 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
648 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
2764 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4467 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
4506 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_32SVR4()
4748 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_64SVR4()
5378 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_Darwin()
5769 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
5779 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| D | PPCFastISel.cpp | 1597 SmallVector<ISD::OutputArg, 4> Outs; in SelectRet() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2692 const SmallVectorImpl<ISD::OutputArg> &Outs, in isEligibleForTailCallOptimization()
2858 SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; in LowerCall() local
3221 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
3233 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1032 SmallVector<ISD::OutputArg, 4> Outs; in X86SelectRet() local
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