| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| D | Execution.cpp | 55 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst()
66 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst()
77 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst()
88 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst()
99 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst()
138 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ()
152 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE()
166 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT()
180 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT()
194 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIShrinkInstructions.cpp | 112 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() local
304 const MachineOperand *Src1 = in runOnMachineFunction() local
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| D | R600ExpandSpecialInstrs.cpp | 225 unsigned Src1 = BMI->getOperand( in runOnMachineFunction() local
276 unsigned Src1 = 0; in runOnMachineFunction() local
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| D | SIInstrInfo.cpp | 835 unsigned Src1 = MI->getOperand(2).getReg(); in expandPostRAPseudo() local
911 MachineOperand &Src1 = MI->getOperand(Src1Idx); in commuteInstructionImpl() local
996 MachineOperand &Src1 = MI->getOperand(Src1Idx); in findCommutedOpIndices() local
1063 MachineOperand *Src1 = getNamedOperand(*UseMI, AMDGPU::OpName::src1); in FoldImmediate() local
1268 const MachineOperand *Src1 = getNamedOperand(*MI, AMDGPU::OpName::src1); in convertToThreeAddress() local
1559 const MachineOperand &Src1 = MI->getOperand(Src1Idx); in verifyInstruction() local
1851 MachineOperand &Src1 = MI->getOperand(Src1Idx); in legalizeOperandsVOP2() local
2710 MachineOperand &Src1 = Inst->getOperand(2); in splitScalar64BitBinaryOp() local
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| D | R600InstrInfo.cpp | 1266 MachineOperand &Src1 = MI->getOperand( in buildSlotOfVectorInstruction() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 159 MachineOperand &Src1 = MI->getOperand(1); in runOnMachineFunction() local
176 MachineOperand &Src1 = MI->getOperand(1); in runOnMachineFunction() local
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| D | HexagonGenMux.cpp | 171 unsigned HexagonGenMux::getMuxOpcode(const MachineOperand &Src1, in getMuxOpcode()
262 MachineOperand *Src1 = &Def1->getOperand(2), *Src2 = &Def2->getOperand(2); in genMuxInBlock() local
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| D | HexagonISelDAGToDAG.cpp | 1112 SDNode* Src1 = N->getOperand(0).getNode(); in SelectAdd() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 215 unsigned Src1 = 0, SubReg1; in isProfitableToTransform() local
308 unsigned Src1 = 0, SubReg1; in transformInstruction() local
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| D | AArch64FastISel.cpp | 4482 const Value *Src1 = I->getOperand(1); in selectMul() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 154 SDValue Src1, SDValue Src2, uint64_t Size) { in emitCLC()
188 SDValue Src1, SDValue Src2, SDValue Size, in EmitTargetCodeForMemcmp()
242 SDValue Src1, SDValue Src2, in EmitTargetCodeForStrcmp()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600ExpandSpecialInstrs.cpp | 98 unsigned Src1 = 0; in runOnMachineFunction() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FixupLEAs.cpp | 369 const MachineOperand &Src1 = MI->getOperand(SrcR1 == DstR ? 1 : 3); in processInstructionForSLM() local
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| D | X86ISelLowering.cpp | 16345 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16353 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16376 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16403 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16421 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16433 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16454 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16491 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16513 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16548 SDValue Src1 = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
[all …]
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1050 unsigned Src1 = MI->getOperand(1).getReg(); in printArithExtend() local
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 6869 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); in emitTernaryFPBuiltin() local
6881 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); in emitFPIntBuiltin() local
6919 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); in EmitAMDGPUBuiltinExpr() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2817 SDValue Src1 = Op.getOperand(0); in LowerADDC_ADDE_SUBC_SUBE() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1476 SDValue Src1 = N->getOperand(2); in SplitVecOp_VSELECT() local
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| D | SelectionDAGBuilder.cpp | 2707 SDValue Src1 = getValue(I.getOperand(0)); in visitShuffleVector() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9084 unsigned Src1 = MI->getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
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