| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 867 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in fromString() local
872 Ops[4].getAsInteger(10, CRm); in fromString()
874 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in fromString()
902 uint32_t CRm = (Bits >> 3) & 0xf; in toString() local
906 + "_c" + utostr(CRm) + "_" + utostr(Op2); in toString()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4789 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4790 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4792 imm:$CRm, imm:$opc2)]>,
4799 bits<4> CRm;
4801 let Inst{3-0} = CRm;
4811 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4812 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4814 imm:$CRm, imm:$opc2)]>,
4822 bits<4> CRm;
4824 let Inst{3-0} = CRm;
[all …]
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| D | ARMInstrThumb2.td | 4126 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2",
4136 bits<4> CRm;
4143 let Inst{3-0} = CRm;
4149 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm", pattern> {
4158 bits<4> CRm;
4164 let Inst{3-0} = CRm;
4171 c_imm:$CRm, imm0_7:$opc2),
4173 imm:$CRm, imm:$opc2)]>,
4175 def : t2InstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
4177 c_imm:$CRm, 0, pred:$p)>;
[all …]
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| /external/vixl/src/vixl/a64/ |
| D | disasm-a64.cc | 1291 form = (instr->CRm() == 0xf) ? NULL : "'IX"; in VisitSystem()
3150 AppendToOutput("#0x%" PRIx32, instr->CRm()); in SubstituteImmediateField()
3457 case 'm': cr = instr->CRm(); break; in SubstituteCrField()
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| D | constants-a64.h | 135 V_(CRm, 11, 8, Bits) \
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| D | assembler-a64.cc | 1909 Emit(SYS | ImmSysOp1(op1) | CRn(crn) | CRm(crm) | ImmSysOp2(op2) | Rt(rt)); in sys()
2556 Emit(CLREX | CRm(imm4)); in clrex()
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| D | assembler-a64.h | 4002 static Instr CRm(int imm4) { in CRm() function
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| /external/v8/src/arm64/ |
| D | constants-arm64.h | 201 V_(CRm, 11, 8, Bits) \
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrFormats.td | 856 // Hint instructions that take both a CRm and a 3-bit immediate.
870 // CRm. op2 differentiates the opcodes.
881 : SimpleSystemI<0, (ins crmtype:$CRm), asm, "\t$CRm", pattern>,
883 bits<4> CRm;
885 let Inst{11-8} = CRm;
896 // concatenation of op0, op1, CRn, CRm, op2. 16-bit immediate.
923 // "psb" is an alias to "hint" only for certain values of CRm:Op2 fields.
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| D | AArch64InstrInfo.td | 398 [(int_aarch64_dmb (i32 imm32_0_15:$CRm))]>;
401 [(int_aarch64_dsb (i32 imm32_0_15:$CRm))]>;
404 [(int_aarch64_isb (i32 imm32_0_15:$CRm))]>;
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 5201 unsigned CRm = fieldFromInstruction(Val, 0, 4); in DecodeMRRC2() local
5219 Inst.addOperand(MCOperand::createImm(CRm)); in DecodeMRRC2()
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| /external/valgrind/VEX/priv/ |
| D | guest_arm64_toIR.c | 6829 UInt CRm = INSN(11,8); in dis_ARM64_branch_etc() local
6830 vassert(opc <= 2 && CRm <= 15); in dis_ARM64_branch_etc()
6837 DIP("%s %s\n", opNames[opc], howNames[CRm]); in dis_ARM64_branch_etc()
|