| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 914 __ Clz(i.OutputRegister64(), i.InputRegister64(0)); in AssembleArchInstruction() local
917 __ Clz(i.OutputRegister32(), i.InputRegister32(0)); in AssembleArchInstruction() local
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| /external/vixl/test/ |
| D | test-disasm-a64.cc | 4883 COMPARE(Clz(v1.V8B(), v8.V8B()), "clz v1.8b, v8.8b"); in TEST()
4884 COMPARE(Clz(v2.V16B(), v9.V16B()), "clz v2.16b, v9.16b"); in TEST()
4885 COMPARE(Clz(v3.V4H(), v1.V4H()), "clz v3.4h, v1.4h"); in TEST()
4886 COMPARE(Clz(v4.V8H(), v2.V8H()), "clz v4.8h, v2.8h"); in TEST()
4887 COMPARE(Clz(v5.V2S(), v3.V2S()), "clz v5.2s, v3.2s"); in TEST()
4888 COMPARE(Clz(v6.V4S(), v4.V4S()), "clz v6.4s, v4.4s"); in TEST()
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| D | test-assembler-a64.cc | 1577 __ Clz(w0, w24); in TEST() local
1578 __ Clz(x1, x24); in TEST() local
1579 __ Clz(w2, w25); in TEST() local
1580 __ Clz(x3, x25); in TEST() local
1581 __ Clz(w4, w26); in TEST() local
1582 __ Clz(x5, x26); in TEST() local
18391 __ Clz(v22.V8B() , v0.V8B()); in TEST() local
18392 __ Clz(v23.V16B(), v0.V16B()); in TEST() local
18393 __ Clz(v24.V4H() , v0.V4H()); in TEST() local
18394 __ Clz(v25.V8H() , v0.V8H()); in TEST() local
[all …]
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 422 void MacroAssembler::Clz(const Register& rd, const Register& rn) { in Clz() function
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| D | macro-assembler-arm64.h | 340 inline void Clz(const Register& rd, const Register& rn);
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.h | 281 void Clz(Register rd, Register rs);
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| D | macro-assembler-mips.cc | 1748 void MacroAssembler::Clz(Register rd, Register rs) { in Clz() function in v8::internal::MacroAssembler
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1061 void Clz(const Register& rd, const Register& rn) { in Clz() function
2256 V(clz, Clz) \
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| /external/v8/test/cctest/ |
| D | test-assembler-mips.cc | 209 __ Clz(v0, t0); // 29 in TEST() local
210 __ Clz(v1, t1); // 19 in TEST() local
212 __ Clz(v1, t2); // 3 in TEST() local
214 __ Clz(v1, t7); // 0 in TEST() local
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| D | test-assembler-mips64.cc | 217 __ Clz(v0, a4); // 29 in TEST() local
218 __ Clz(v1, a5); // 19 in TEST() local
220 __ Clz(v1, a6); // 3 in TEST() local
222 __ Clz(v1, t3); // 0 in TEST() local
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| D | test-assembler-arm64.cc | 1555 __ Clz(w0, w24); in TEST() local
1556 __ Clz(x1, x24); in TEST() local
1557 __ Clz(w2, w25); in TEST() local
1558 __ Clz(x3, x25); in TEST() local
1559 __ Clz(w4, w26); in TEST() local
1560 __ Clz(x5, x26); in TEST() local
|
| /external/v8/src/compiler/mips/ |
| D | code-generator-mips.cc | 689 __ Clz(i.OutputRegister(), i.InputRegister(0)); in AssembleArchInstruction() local
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.h | 309 void Clz(Register rd, Register rs);
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| D | macro-assembler-mips64.cc | 2151 void MacroAssembler::Clz(Register rd, Register rs) { in Clz() function in v8::internal::MacroAssembler
|
| /external/v8/src/compiler/mips64/ |
| D | code-generator-mips64.cc | 733 __ Clz(i.OutputRegister(), i.InputRegister(0)); in AssembleArchInstruction() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2274 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, VT, Zext); in LowerSETCC() local
2275 SDValue Scc = DAG.getNode(ISD::SRL, dl, VT, Clz, in LowerSETCC()
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| /external/v8/src/crankshaft/mips/ |
| D | lithium-codegen-mips.cc | 3606 __ Clz(result, input); in DoMathClz32() local
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 3752 __ Clz(result, input); in DoMathClz32() local
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| /external/v8/src/crankshaft/mips64/ |
| D | lithium-codegen-mips64.cc | 3811 __ Clz(result, input); in DoMathClz32() local
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