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Searched refs:Fmul (Results 1 – 12 of 12) sorted by relevance

/external/v8/src/arm64/
Dcodegen-arm64.cc598 __ Fmul(double_temp1, double_temp1, double_temp2); in EmitMathExp() local
601 __ Fmul(double_temp2, double_temp1, double_temp1); in EmitMathExp() local
603 __ Fmul(double_temp3, double_temp3, double_temp2); in EmitMathExp() local
609 __ Fmul(double_temp3, double_temp3, double_temp2); in EmitMathExp() local
630 __ Fmul(result, double_temp3, double_temp1); in EmitMathExp() local
Dmacro-assembler-arm64-inl.h778 void MacroAssembler::Fmul(const FPRegister& fd, in Fmul() function
Dmacro-assembler-arm64.h426 inline void Fmul(const FPRegister& fd,
Dcode-stubs-arm64.cc936 __ Fmul(scratch1_double, scratch1_double, scratch1_double); in Generate() local
942 __ Fmul(result_double, result_double, scratch1_double); in Generate() local
/external/vixl/examples/
Dneon-matrix-multiply.cc52 __ Fmul(v_out, v4.V4S(), v_in, 0); // e.g. (v0.V4S(), v4.V4S(), v8.S(), 0). in GenerateMultiplyColumn() local
/external/v8/test/cctest/
Dtest-assembler-arm64.cc5265 __ Fmul(s0, s17, s18); in TEST() local
5266 __ Fmul(s1, s18, s19); in TEST() local
5267 __ Fmul(s2, s14, s14); in TEST() local
5268 __ Fmul(s3, s15, s20); in TEST() local
5269 __ Fmul(s4, s16, s20); in TEST() local
5270 __ Fmul(s5, s15, s19); in TEST() local
5271 __ Fmul(s6, s19, s16); in TEST() local
5273 __ Fmul(d7, d30, d31); in TEST() local
5274 __ Fmul(d8, d29, d31); in TEST() local
5275 __ Fmul(d9, d26, d26); in TEST() local
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/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc956 __ Fmul(i.OutputFloat32Register(), i.InputFloat32Register(0), in AssembleArchInstruction() local
1000 __ Fmul(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
/external/vixl/test/
Dtest-assembler-a64.cc9349 __ Fmul(s0, s17, s18); in TEST() local
9350 __ Fmul(s1, s18, s19); in TEST() local
9351 __ Fmul(s2, s14, s14); in TEST() local
9352 __ Fmul(s3, s15, s20); in TEST() local
9353 __ Fmul(s4, s16, s20); in TEST() local
9354 __ Fmul(s5, s15, s19); in TEST() local
9355 __ Fmul(s6, s19, s16); in TEST() local
9357 __ Fmul(d7, d30, d31); in TEST() local
9358 __ Fmul(d8, d29, d31); in TEST() local
9359 __ Fmul(d9, d26, d26); in TEST() local
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Dtest-disasm-a64.cc3859 COMPARE(Fmul(v6.M, v7.M, v8.M), "fmul v6." S ", v7." S ", v8." S); in TEST()
4185 COMPARE(Fmul(v0.V2S(), v1.V2S(), v2.S(), 0), "fmul v0.2s, v1.2s, v2.s[0]"); in TEST()
4186 COMPARE(Fmul(v2.V4S(), v3.V4S(), v15.S(), 3), "fmul v2.4s, v3.4s, v15.s[3]"); in TEST()
4187 COMPARE(Fmul(v0.V2D(), v1.V2D(), v2.D(), 0), "fmul v0.2d, v1.2d, v2.d[0]"); in TEST()
4188 COMPARE(Fmul(d0, d1, v2.D(), 0), "fmul d0, d1, v2.d[0]"); in TEST()
4189 COMPARE(Fmul(s0, s1, v2.S(), 0), "fmul s0, s1, v2.s[0]"); in TEST()
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h1356 void Fmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fmul() function
2356 V(fmul, Fmul) \
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2666 SDValue Fmul = DAG.getNode(ISD::FMUL, dl, MVT::f64, TwoP32, Fcvt); in ExpandLegalINT_TO_FP() local
2669 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2); in ExpandLegalINT_TO_FP()
/external/v8/src/crankshaft/arm64/
Dlithium-codegen-arm64.cc1643 case Token::MUL: __ Fmul(result, left, right); break; in DoArithmeticD() local