/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 100 void HexagonInstrInfo::anchor() {} in anchor() 102 HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST) in HexagonInstrInfo() function in HexagonInstrInfo 233 unsigned HexagonInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot() 258 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() 293 bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, in AnalyzeBranch() 459 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { in RemoveBranch() 480 unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB, in InsertBranch() 575 bool HexagonInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB, in isProfitableToIfCvt() 582 bool HexagonInstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB, in isProfitableToIfCvt() 590 bool HexagonInstrInfo::isProfitableToDupForIfCvt(MachineBasicBlock &MBB, in isProfitableToDupForIfCvt() [all …]
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D | HexagonBitTracker.h | 17 class HexagonInstrInfo; variable 27 const HexagonInstrInfo &tii, MachineFunction &mf); 38 const HexagonInstrInfo &TII;
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D | HexagonSubtarget.h | 52 HexagonInstrInfo InstrInfo; 68 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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D | HexagonFrameLowering.h | 18 class HexagonInstrInfo; variable 84 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
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D | HexagonFixupHwLoops.cpp | 106 const HexagonInstrInfo *HII = in fixupLoopInstrs() 107 static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in fixupLoopInstrs()
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D | HexagonNewValueJump.cpp | 70 const HexagonInstrInfo *QII; 111 static bool canBeFeederToNewValueJump(const HexagonInstrInfo *QII, in INITIALIZE_PASS_DEPENDENCY() 213 static bool canCompareBeNewValueJump(const HexagonInstrInfo *QII, in canCompareBeNewValueJump() 399 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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D | Hexagon.td | 227 include "HexagonInstrInfo.td" 231 def HexagonInstrInfo : InstrInfo; 261 let InstructionSet = HexagonInstrInfo;
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D | HexagonPeephole.cpp | 84 const HexagonInstrInfo *QII; 115 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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D | HexagonInstrInfo.h | 31 class HexagonInstrInfo : public HexagonGenInstrInfo { 36 explicit HexagonInstrInfo(HexagonSubtarget &ST);
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D | CMakeLists.txt | 33 HexagonInstrInfo.cpp
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D | HexagonVLIWPacketizer.h | 40 const HexagonInstrInfo *HII;
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D | HexagonBitSimplify.cpp | 182 uint16_t Begin, const HexagonInstrInfo &HII); 589 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() 921 const HexagonInstrInfo &HII; 1009 RedundantInstrElimination(BitTracker &bt, const HexagonInstrInfo &hii, in RedundantInstrElimination() 1023 const HexagonInstrInfo &HII; 1322 ConstGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in ConstGeneration() 1332 const HexagonInstrInfo &HII; 1466 CopyGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in CopyGeneration() 1474 const HexagonInstrInfo &HII; 1668 BitSimplification(BitTracker &bt, const HexagonInstrInfo &hii, in BitSimplification() [all …]
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D | HexagonVLIWPacketizer.cpp | 86 const HexagonInstrInfo *HII; 440 const HexagonInstrInfo *HII) { in getPredicateSense() 449 const HexagonInstrInfo *HII) { in getPostIncrementOperand() 821 const HexagonInstrInfo *QII) { in getPredicatedRegister() 973 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
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D | HexagonCopyToCombine.cpp | 60 const HexagonInstrInfo *TII; 115 const HexagonInstrInfo *TII, in isCombinableInstType()
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D | HexagonGenMux.cpp | 54 const HexagonInstrInfo *HII;
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D | HexagonStoreWidening.cpp | 54 const HexagonInstrInfo *TII;
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D | HexagonExpandPredSpillCode.cpp | 72 const HexagonInstrInfo *TII = QST.getInstrInfo(); in runOnMachineFunction()
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D | HexagonGenPredicate.cpp | 84 const HexagonInstrInfo *TII;
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D | HexagonScheduleV60.td | 33 // corresponding methods to the class HexagonInstrInfo.
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D | HexagonExpandCondsets.cpp | 118 const HexagonInstrInfo *HII; 1309 HII = static_cast<const HexagonInstrInfo*>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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D | HexagonFrameLowering.cpp | 1331 const HexagonInstrInfo &HII, unsigned SP, unsigned CF) const { in expandAlloca()
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D | HexagonBitTracker.cpp | 27 const HexagonInstrInfo &tii, in HexagonEvaluator()
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D | HexagonSplitDouble.cpp | 65 const HexagonInstrInfo *TII;
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/external/llvm/test/CodeGen/Hexagon/ |
D | tail-dup-subreg-abort.ll | 6 ; This could lead to HexagonInstrInfo::copyPhysReg aborting on an unhandled
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D | circ_ldd_bug.ll | 7 ; UNREACHABLE executed at llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp:615!
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