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Searched refs:LD2 (Results 1 – 21 of 21) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dmerge-store-partially-alias-loads.ll21 ; DBGDAG-DAG: [[LD2:t[0-9]+]]: i16,ch = load<LD2[%tmp81](align=1)> [[ENTRYTOKEN]], [[BASEPTR]], und…
24 ; DBGDAG: [[LOADTOKEN:t[0-9]+]]: ch = TokenFactor [[LD2]]:1, [[LD1]]:1
26 ; DBGDAG-DAG: [[ST2:t[0-9]+]]: ch = store<ST2[%tmp10](align=1)> [[LOADTOKEN]], [[LD2]], t{{[0-9]+}}…
Dcodegen-prepare-extload.ll291 ; OPT-NEXT: [[LD2:%[a-zA-Z_0-9-]+]] = load i32, i32* %addr2
292 ; OPT-NEXT: [[SEXTLD2:%[a-zA-Z_0-9-]+]] = sext i32 [[LD2]] to i64
/external/libvpx/libvpx/vp9/common/mips/msa/
Dvp9_mfqe_msa.c31 LD2(src_ptr, src_stride, src0_d, src1_d); in filter_by_weight8x8_msa()
33 LD2(dst_ptr, dst_stride, dst0_d, dst1_d); in filter_by_weight8x8_msa()
37 LD2(src_ptr, src_stride, src0_d, src1_d); in filter_by_weight8x8_msa()
39 LD2((dst_ptr + 2 * dst_stride), dst_stride, dst0_d, dst1_d); in filter_by_weight8x8_msa()
/external/libvpx/libvpx/vp8/common/mips/msa/
Dmfqe_msa.c33 LD2(src_ptr, src_stride, src0_d, src1_d); in filter_by_weight8x8_msa()
35 LD2(dst_ptr, dst_stride, dst0_d, dst1_d); in filter_by_weight8x8_msa()
39 LD2(src_ptr, src_stride, src0_d, src1_d); in filter_by_weight8x8_msa()
41 LD2((dst_ptr + 2 * dst_stride), dst_stride, dst0_d, dst1_d); in filter_by_weight8x8_msa()
Dvp8_macros_msa.h238 #define LD2(psrc, stride, out0, out1) \ macro
245 LD2((psrc), stride, out0, out1); \
246 LD2((psrc) + 2 * stride, stride, out2, out3); \
/external/llvm/test/CodeGen/PowerPC/
Dunal-altivec.ll40 ; CHECK-DAG: lvx [[LD2:[0-9]+]], [[B3]], [[C16]]
42 ; CHECK-DAG: vperm [[R1:[0-9]+]], [[LD1]], [[LD2]], [[PC]]
43 ; CHECK-DAG: vperm [[R2:[0-9]+]], [[LD2]], [[LD3]], [[PC]]
/external/libhevc/common/arm64/
Dihevc_sao_band_offset_chroma.s309 LD2 {v5.8b, v6.8b},[x4] //vld1q_u8(pu1_src_cpy)
312 LD2 {v13.8b, v14.8b},[x5] //vld1q_u8(pu1_src_cpy)
315 LD2 {v17.8b, v18.8b},[x6] //vld1q_u8(pu1_src_cpy)
318 LD2 {v21.8b, v22.8b},[x7] //vld1q_u8(pu1_src_cpy)
363 LD2 {v5.8b, v6.8b},[x4] //vld1q_u8(pu1_src_cpy)
367 LD2 {v13.8b, v14.8b},[x5] //vld1q_u8(pu1_src_cpy)
370 LD2 {v17.8b, v18.8b},[x6] //vld1q_u8(pu1_src_cpy)
379 LD2 {v21.8b, v22.8b},[x7] //vld1q_u8(pu1_src_cpy)
/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-load-1.ll2 …= load 0x16c5890, 0x16f76e0, 0x16f76e0<LD2[undef](align=8), sext from v2i8>", 0x16c5890, 0x16f76e0…
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Dtemporal_filter_msa.c158 LD2(frame1_ptr, stride, f0, f1); in temporal_filter_apply_8size_msa()
160 LD2(frame2_ptr, 8, f2, f3); in temporal_filter_apply_8size_msa()
162 LD2(frame1_ptr, stride, f4, f5); in temporal_filter_apply_8size_msa()
164 LD2(frame2_ptr, 8, f6, f7); in temporal_filter_apply_8size_msa()
/external/libhevc/decoder/arm64/
Dihevcd_fmt_conv_420sp_to_rgba8888.s173 LD2 {v30.8b, v31.8b},[x0],#16 ////D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
175 LD2 {v28.8b, v29.8b},[x7],#16 ////D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row2
292 LD2 {v30.8b, v31.8b},[x0],#16 ////D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
294 LD2 {v28.8b, v29.8b},[x7],#16 ////D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row2
/external/libvpx/libvpx/vpx_dsp/mips/
Dsubtract_msa.c44 LD2(src_ptr, src_stride, src0, src1); in sub_blk_8x8_msa()
46 LD2(pred_ptr, pred_stride, pred0, pred1); in sub_blk_8x8_msa()
Dmacros_msa.h252 #define LD2(psrc, stride, out0, out1) { \ macro
257 LD2((psrc), stride, out0, out1); \
258 LD2((psrc) + 2 * stride, stride, out2, out3); \
/external/llvm/test/CodeGen/AArch64/
Darm64-codegen-prepare-extload.ll285 ; OPT-NEXT: [[LD2:%[a-zA-Z_0-9-]+]] = load i32, i32* %addr2
286 ; OPT-NEXT: [[SEXTLD2:%[a-zA-Z_0-9-]+]] = sext i32 [[LD2]] to i64
/external/vixl/doc/
Dsupported-instructions.md2563 ### LD2 ### subsection
2573 ### LD2 ### subsection
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp7221 LoadSDNode *LD2 = dyn_cast<LoadSDNode>(getBuildPairElt(N, 1)); in CombineConsecutiveLoads() local
7222 if (!LD1 || !LD2 || !ISD::isNON_EXTLoad(LD1) || !LD1->hasOneUse() || in CombineConsecutiveLoads()
7223 LD1->getAddressSpace() != LD2->getAddressSpace()) in CombineConsecutiveLoads()
7227 if (ISD::isNON_EXTLoad(LD2) && in CombineConsecutiveLoads()
7228 LD2->hasOneUse() && in CombineConsecutiveLoads()
7232 !LD2->isVolatile() && in CombineConsecutiveLoads()
7233 DAG.isConsecutiveLoad(LD2, LD1, LD1VT.getSizeInBits()/8, 1)) { in CombineConsecutiveLoads()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td4939 defm LD2 : SIMDLd2Multiple<"ld2">;
4986 defm LD2 : SIMDLdSingleBTied<1, 0b000, "ld2", VecListTwob, GPR64pi2>;
4987 defm LD2 : SIMDLdSingleHTied<1, 0b010, 0, "ld2", VecListTwoh, GPR64pi4>;
4988 defm LD2 : SIMDLdSingleSTied<1, 0b100, 0b00, "ld2", VecListTwos, GPR64pi8>;
4989 defm LD2 : SIMDLdSingleDTied<1, 0b100, 0b01, "ld2", VecListTwod, GPR64pi16>;
5061 defm LD2 : SIMDLdSt2SingleAliases<"ld2">;
/external/clang/include/clang/Basic/
Darm_neon.td844 def LD2 : WInst<"vld2", "2c", "QUlQldQdPlQPl">;
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/
DUnicodeData.txt16971 102CE;CARIAN LETTER LD2;Lo;0;L;;;;;N;;;;;
/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/
DUnicodeData.txt16971 102CE;CARIAN LETTER LD2;Lo;0;L;;;;;N;;;;;
/external/icu/icu4c/source/data/unidata/
DUnicodeData.txt16971 102CE;CARIAN LETTER LD2;Lo;0;L;;;;;N;;;;;
Dppucd.txt20722 cp;102CE;na=CARIAN LETTER LD2