/external/llvm/lib/CodeGen/ |
D | RegAllocFast.cpp | 73 unsigned PhysReg; // Currently held here. member 78 : LastUse(nullptr), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false){} in LiveReg() 124 void markRegUsedInInstr(unsigned PhysReg) { in markRegUsedInInstr() argument 125 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) in markRegUsedInInstr() 130 bool isRegUsedInInstr(unsigned PhysReg) const { in isRegUsedInInstr() 131 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) in isRegUsedInInstr() 177 void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState); 178 unsigned calcSpillCost(unsigned PhysReg) const; 179 void assignVirtToPhysReg(LiveReg&, unsigned PhysReg); 186 LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysReg); [all …]
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D | LiveRegMatrix.cpp | 75 unsigned PhysReg, Callable Func) { in foreachUnit() argument 77 for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in foreachUnit() 89 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in foreachUnit() 97 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) { in assign() argument 99 << " to " << PrintReg(PhysReg, TRI) << ':'); in assign() 101 VRM->assignVirt2Phys(VirtReg.reg, PhysReg); in assign() 103 foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit, in assign() 115 unsigned PhysReg = VRM->getPhys(VirtReg.reg); in unassign() local 117 << " from " << PrintReg(PhysReg, TRI) << ':'); in unassign() 120 foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit, in unassign() [all …]
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D | RegAllocGreedy.cpp | 261 unsigned PhysReg; member 274 PhysReg = Reg; in reset() 355 unsigned canReassign(LiveInterval &VirtReg, unsigned PhysReg); 360 bool mayRecolorAllInterferences(unsigned PhysReg, LiveInterval &VirtReg, 382 unsigned PhysReg, unsigned &CostPerUseLimit, 409 unsigned PhysReg; member 410 HintInfo(BlockFrequency Freq, unsigned Reg, unsigned PhysReg) in HintInfo() 411 : Freq(Freq), Reg(Reg), PhysReg(PhysReg) {} in HintInfo() 417 bool isUnusedCalleeSavedReg(unsigned PhysReg) const; 620 unsigned PhysReg; in tryAssign() local [all …]
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D | VirtRegMap.cpp | 170 void addLiveInsForSubRanges(const LiveInterval &LI, unsigned PhysReg) const; 242 unsigned PhysReg) const { in addLiveInsForSubRanges() 280 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges() 296 unsigned PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns() local 297 assert(PhysReg != VirtRegMap::NO_PHYS_REG && "Unmapped virtual register."); in addMBBLiveIns() 300 addLiveInsForSubRanges(LI, PhysReg); in addMBBLiveIns() 310 MBB->addLiveIn(PhysReg); in addMBBLiveIns() 372 unsigned PhysReg = VRM->getPhys(VirtReg); in rewrite() local 373 assert(PhysReg != VirtRegMap::NO_PHYS_REG && in rewrite() 375 assert(!MRI->isReserved(PhysReg) && "Reserved register assignment"); in rewrite() [all …]
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D | RegisterClassInfo.cpp | 99 unsigned PhysReg = RawOrder[i]; in compute() local 101 if (Reserved.test(PhysReg)) in compute() 103 unsigned Cost = TRI->getCostPerUse(PhysReg); in compute() 106 if (CSRNum[PhysReg]) in compute() 108 CSRAlias.push_back(PhysReg); in compute() 112 RCI.Order[N++] = PhysReg; in compute() 121 unsigned PhysReg = CSRAlias[i]; in compute() local 122 unsigned Cost = TRI->getCostPerUse(PhysReg); in compute() 125 RCI.Order[N++] = PhysReg; in compute()
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D | InterferenceCache.h | 42 unsigned PhysReg; variable 97 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {} in Entry() 101 PhysReg = 0; in clear() 107 unsigned getPhysReg() const { return PhysReg; } in getPhysReg() 149 Entry *get(unsigned PhysReg); 202 void setPhysReg(InterferenceCache &Cache, unsigned PhysReg) { in setPhysReg() argument 206 if (PhysReg) in setPhysReg() 207 setEntry(Cache.get(PhysReg)); in setPhysReg()
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D | InterferenceCache.cpp | 56 InterferenceCache::Entry *InterferenceCache::get(unsigned PhysReg) { in get() argument 57 unsigned E = PhysRegEntries[PhysReg]; in get() 58 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) { in get() 74 Entries[E].reset(PhysReg, LIUArray, TRI, MF); in get() 75 PhysRegEntries[PhysReg] = E; in get() 89 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) in revalidate() 100 PhysReg = physReg; in reset() 106 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in reset() 115 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) { in valid() 187 if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) { in update() [all …]
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D | RegAllocBasic.cpp | 111 bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, 166 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, in spillInterferences() argument 173 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in spillInterferences() 185 DEBUG(dbgs() << "spilling " << TRI->getName(PhysReg) << in spillInterferences() 227 while (unsigned PhysReg = Order.next()) { in selectOrSplit() local 229 switch (Matrix->checkInterference(VirtReg, PhysReg)) { in selectOrSplit() 232 return PhysReg; in selectOrSplit() 236 PhysRegSpillCands.push_back(PhysReg); in selectOrSplit()
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D | LiveRangeCalc.h | 115 SlotIndex Kill, unsigned PhysReg); 172 void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg = 0); 183 void extendToUses(LiveRange &LR, unsigned PhysReg) { in extendToUses() argument 184 extendToUses(LR, PhysReg, ~0u); in extendToUses()
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D | MachineRegisterInfo.cpp | 417 bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg, in isConstantPhysReg() argument 419 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg)); in isConstantPhysReg() 423 for (MCRegAliasIterator AI(PhysReg, getTargetRegisterInfo(), true); in isConstantPhysReg() 474 bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const { in isPhysRegModified() 475 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegModified() 478 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified() 488 bool MachineRegisterInfo::isPhysRegUsed(unsigned PhysReg) const { in isPhysRegUsed() 489 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegUsed() 492 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
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D | MachineBasicBlock.cpp | 290 OS << ' ' << PrintReg(LI.PhysReg, TRI); in print() 338 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in removeLiveIn() 350 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in isLiveIn() 357 return LI0.PhysReg < LI1.PhysReg; in sortUniqueLiveIns() 364 unsigned PhysReg = I->PhysReg; in sortUniqueLiveIns() local 366 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J) in sortUniqueLiveIns() 368 Out->PhysReg = PhysReg; in sortUniqueLiveIns() 375 MachineBasicBlock::addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC) { in addLiveIn() argument 377 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && "Expected physreg"); in addLiveIn() 382 bool LiveIn = isLiveIn(PhysReg); in addLiveIn() [all …]
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D | LiveRangeCalc.cpp | 223 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) { in extend() argument 239 if (findReachingDefs(LR, *UseMBB, Use, PhysReg)) in extend() 259 SlotIndex Use, unsigned PhysReg) { in findReachingDefs() argument 276 errs() << "Use of " << PrintReg(PhysReg) in findReachingDefs() 284 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) && in findReachingDefs() 285 !MBB->isLiveIn(PhysReg)) { in findReachingDefs() 287 errs() << "The register " << PrintReg(PhysReg) in findReachingDefs()
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D | AllocationOrder.h | 82 bool isHint(unsigned PhysReg) const { in isHint() argument 83 return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end(); in isHint()
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D | RegisterCoalescer.h | 66 CoalescerPair(unsigned VirtReg, unsigned PhysReg, in CoalescerPair() argument 68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), in CoalescerPair()
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D | ShrinkWrap.cpp | 232 unsigned PhysReg = MO.getReg(); in INITIALIZE_PASS_DEPENDENCY() local 233 if (!PhysReg) in INITIALIZE_PASS_DEPENDENCY() 235 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && in INITIALIZE_PASS_DEPENDENCY() 237 UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg); in INITIALIZE_PASS_DEPENDENCY()
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D | LiveVariables.cpp | 567 assert(TargetRegisterInfo::isPhysicalRegister(LI.PhysReg) && in runOnBlock() 569 HandlePhysRegDef(LI.PhysReg, nullptr, Defs); in runOnBlock() 608 if (!TRI->isInAllocatableClass(LI.PhysReg)) in runOnBlock() 610 LiveOuts.insert(LI.PhysReg); in runOnBlock()
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D | DeadMachineInstructionElim.cpp | 114 LivePhysRegs.set(LI.PhysReg); in runOnMachineFunction()
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/external/llvm/include/llvm/CodeGen/ |
D | LiveRegMatrix.h | 103 InterferenceKind checkInterference(LiveInterval &VirtReg, unsigned PhysReg); 108 void assign(LiveInterval &VirtReg, unsigned PhysReg); 116 bool isPhysRegUsed(unsigned PhysReg) const; 128 bool checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg = 0); 133 bool checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg);
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D | RegisterClassInfo.h | 109 unsigned getLastCalleeSavedAlias(unsigned PhysReg) const { in getLastCalleeSavedAlias() argument 110 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg)); in getLastCalleeSavedAlias() 111 if (unsigned N = CSRNum[PhysReg]) in getLastCalleeSavedAlias()
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D | MachineRegisterInfo.h | 543 bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const; 637 bool isPhysRegModified(unsigned PhysReg) const; 643 bool isPhysRegUsed(unsigned PhysReg) const; 680 bool canReserveReg(unsigned PhysReg) const { in canReserveReg() argument 681 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg() 699 bool isReserved(unsigned PhysReg) const { in isReserved() argument 700 return getReservedRegs().test(PhysReg); in isReserved() 709 bool isAllocatable(unsigned PhysReg) const { in isAllocatable() argument 710 return getTargetRegisterInfo()->isInAllocatableClass(PhysReg) && in isAllocatable() 711 !isReserved(PhysReg); in isAllocatable()
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D | MachineOperand.h | 475 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { in clobbersPhysReg() argument 477 assert(PhysReg < (1u << 30) && "Not a physical register"); in clobbersPhysReg() 478 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32)); in clobbersPhysReg() 482 bool clobbersPhysReg(unsigned PhysReg) const { in clobbersPhysReg() argument 483 return clobbersPhysReg(getRegMask(), PhysReg); in clobbersPhysReg()
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D | MachineBasicBlock.h | 76 MCPhysReg PhysReg; 79 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask) 80 : PhysReg(PhysReg), LaneMask(LaneMask) {} 345 void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask = ~0u) { 346 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask)); 360 unsigned addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC);
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/external/llvm/utils/TableGen/ |
D | FastISelEmitter.cpp | 426 std::string PhysReg; in PhyRegForNode() local 429 return PhysReg; in PhyRegForNode() 433 return PhysReg; in PhyRegForNode() 435 PhysReg += cast<StringInit>(OpLeafRec->getValue("Namespace")->getValue()) in PhyRegForNode() 437 PhysReg += "::"; in PhyRegForNode() 438 PhysReg += Target.getRegBank().getReg(OpLeafRec)->getName(); in PhyRegForNode() 439 return PhysReg; in PhyRegForNode() 542 std::string PhysReg = PhyRegForNode(InstPatNode->getChild(i), Target); in collectPatterns() local 543 if (PhysReg.empty()) { in collectPatterns() 553 PhysRegInputs->push_back(PhysReg); in collectPatterns()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.cpp | 113 unsigned &PhysReg, int &Cost) { in CheckForPhysRegDependency() argument 124 PhysReg = Reg; in CheckForPhysRegDependency() 129 PhysReg = Reg; in CheckForPhysRegDependency() 132 if (PhysReg != 0) { in CheckForPhysRegDependency() 466 unsigned PhysReg = 0; in AddSchedEdges() local 469 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost); in AddSchedEdges() 470 assert((PhysReg == 0 || !isChain) && in AddSchedEdges() 478 PhysReg = 0; in AddSchedEdges() 487 : SDep(OpSU, SDep::Data, PhysReg); in AddSchedEdges()
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/external/llvm/test/CodeGen/X86/ |
D | misched-copy.ll | 8 ; MUL_HiLo PhysReg use copies should be just above the mul. 9 ; MUL_HiLo PhysReg def copies should be just below the mul.
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