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Searched refs:TRUNCATE (Results 1 – 25 of 46) sorted by relevance

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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/scripts_cvs/searchcvs/
Dmysql-modelingschema.truncate5 TRUNCATE TABLE `bugs`;
6 TRUNCATE TABLE `commits`;
7 TRUNCATE TABLE `cvsfiles`;
8 TRUNCATE TABLE `filetags`;
9 TRUNCATE TABLE `tags`;
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp555 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 1 }, in getCastInstrCost()
556 { ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, 1 }, in getCastInstrCost()
557 { ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, 1 }, in getCastInstrCost()
558 { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 1 }, in getCastInstrCost()
628 { ISD::TRUNCATE, MVT::v4i8, MVT::v4i64, 2 }, in getCastInstrCost()
629 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i64, 2 }, in getCastInstrCost()
630 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 2 }, in getCastInstrCost()
631 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 2 }, in getCastInstrCost()
632 { ISD::TRUNCATE, MVT::v8i16, MVT::v8i32, 2 }, in getCastInstrCost()
633 { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 4 }, in getCastInstrCost()
[all …]
DX86ISelLowering.cpp747 setOperationAction(ISD::TRUNCATE, VT, Expand); in X86TargetLowering()
1145 setOperationAction(ISD::TRUNCATE, MVT::v16i8, Custom); in X86TargetLowering()
1146 setOperationAction(ISD::TRUNCATE, MVT::v8i16, Custom); in X86TargetLowering()
1147 setOperationAction(ISD::TRUNCATE, MVT::v4i32, Custom); in X86TargetLowering()
1407 setOperationAction(ISD::TRUNCATE, MVT::i1, Custom); in X86TargetLowering()
1408 setOperationAction(ISD::TRUNCATE, MVT::v16i8, Custom); in X86TargetLowering()
1409 setOperationAction(ISD::TRUNCATE, MVT::v8i32, Custom); in X86TargetLowering()
1413 setOperationAction(ISD::TRUNCATE, MVT::v2i1, Custom); in X86TargetLowering()
1414 setOperationAction(ISD::TRUNCATE, MVT::v4i1, Custom); in X86TargetLowering()
1441 setOperationAction(ISD::TRUNCATE, MVT::v8i1, Custom); in X86TargetLowering()
[all …]
/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp83 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 }, in getCastInstrCost()
84 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 }, in getCastInstrCost()
99 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, in getCastInstrCost()
100 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, in getCastInstrCost()
227 { ISD::TRUNCATE, MVT::i32, MVT::i64, 0 }, in getCastInstrCost()
228 { ISD::TRUNCATE, MVT::i16, MVT::i64, 0 }, in getCastInstrCost()
229 { ISD::TRUNCATE, MVT::i8, MVT::i64, 0 }, in getCastInstrCost()
230 { ISD::TRUNCATE, MVT::i1, MVT::i64, 0 } in getCastInstrCost()
DARMSelectionDAGInfo.cpp95 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); in EmitSpecializedLibcall()
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp191 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 }, in getCastInstrCost()
192 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 }, in getCastInstrCost()
193 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, in getCastInstrCost()
194 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, in getCastInstrCost()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp367 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, in ShrinkDemandedOp()
369 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, in ShrinkDemandedOp()
993 case ISD::TRUNCATE: { in SimplifyDemandedBits()
1036 SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl, in SimplifyDemandedBits()
1316 if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE) in SimplifySetCC()
1385 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreExt); in SimplifySetCC()
1541 return DAG.getNode(ISD::TRUNCATE, dl, VT, N0); in SimplifySetCC()
1584 if (Op0.getOpcode() == ISD::TRUNCATE) in SimplifySetCC()
1601 DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)), in SimplifySetCC()
1721 return DAG.getNode(ISD::TRUNCATE, dl, VT, in SimplifySetCC()
[all …]
DDAGCombiner.cpp948 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, VT, SDValue(ExtLoad, 0)); in ReplaceLoadWithPromotedLoad()
1083 return DAG.getNode(ISD::TRUNCATE, dl, VT, in PromoteIntBinOp()
1130 return DAG.getNode(ISD::TRUNCATE, dl, VT, in PromoteIntShiftOp()
1196 SDValue Result = DAG.getNode(ISD::TRUNCATE, dl, VT, NewLD); in PromoteLoad()
1406 case ISD::TRUNCATE: return visitTRUNCATE(N); in visit()
2508 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1); in visitMULHS()
2544 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1); in visitMULHU()
2623 Hi = DAG.getNode(ISD::TRUNCATE, DL, VT, Hi); in visitSMUL_LOHI()
2625 Lo = DAG.getNode(ISD::TRUNCATE, DL, VT, Lo); in visitSMUL_LOHI()
2654 Hi = DAG.getNode(ISD::TRUNCATE, DL, VT, Hi); in visitUMUL_LOHI()
[all …]
DLegalizeIntegerTypes.cpp88 case ISD::TRUNCATE: Res = PromoteIntRes_TRUNCATE(N); break; in PromoteIntegerResult()
620 return DAG.getNode(ISD::TRUNCATE, dl, NVT, SetCC); in PromoteIntRes_SETCC()
716 EOp1 = DAG.getNode(ISD::TRUNCATE, dl, HalfNVT, EOp1); in PromoteIntRes_TRUNCATE()
717 EOp2 = DAG.getNode(ISD::TRUNCATE, dl, HalfNVT, EOp2); in PromoteIntRes_TRUNCATE()
723 return DAG.getNode(ISD::TRUNCATE, dl, NVT, Res); in PromoteIntRes_TRUNCATE()
907 case ISD::TRUNCATE: Res = PromoteIntOp_TRUNCATE(N); break; in PromoteIntegerOperand()
1253 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), N->getValueType(0), Op); in PromoteIntOp_TRUNCATE()
1326 case ISD::TRUNCATE: ExpandIntRes_TRUNCATE(N, Lo, Hi); break; in ExpandIntegerResult()
2420 Lo = DAG.getNode(ISD::TRUNCATE, dl, NVT, N->getOperand(0)); in ExpandIntRes_TRUNCATE()
2425 Hi = DAG.getNode(ISD::TRUNCATE, dl, NVT, Hi); in ExpandIntRes_TRUNCATE()
[all …]
DLegalizeVectorTypes.cpp98 case ISD::TRUNCATE: in ScalarizeVectorResult()
178 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); in ScalarizeVecRes_BUILD_VECTOR()
219 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op); in ScalarizeVecRes_INSERT_VECTOR_ELT()
282 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); in ScalarizeVecRes_SCALAR_TO_VECTOR()
439 case ISD::TRUNCATE: in ScalarizeVectorOperand()
653 case ISD::TRUNCATE: in SplitVectorResult()
1407 case ISD::TRUNCATE: in SplitVectorOperand()
1930 : DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec); in SplitVecOp_TruncateHelper()
2079 case ISD::TRUNCATE: in WidenVectorResult()
2983 case ISD::TRUNCATE: in WidenVectorOperand()
DSelectionDAG.cpp1014 getNode(ISD::TRUNCATE, DL, VT, Op); in getAnyExtOrTrunc()
1020 getNode(ISD::TRUNCATE, DL, VT, Op); in getSExtOrTrunc()
1026 getNode(ISD::TRUNCATE, DL, VT, Op); in getZExtOrTrunc()
1032 return getNode(ISD::TRUNCATE, SL, VT, Op); in getBoolExtOrTrunc()
2337 case ISD::TRUNCATE: { in computeKnownBits()
2702 case ISD::TRUNCATE: in ComputeNumSignBits()
2879 case ISD::TRUNCATE: in getNode()
2995 case ISD::TRUNCATE: in getNode()
3084 if (OpOpcode == ISD::TRUNCATE) { in getNode()
3090 case ISD::TRUNCATE: in getNode()
[all …]
DLegalizeTypes.cpp1155 Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op); in SplitInteger()
1159 Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi); in SplitInteger()
DLegalizeDAG.cpp887 Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value); in LegalizeStoreOps()
2661 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Sh); in ExpandLegalINT_TO_FP()
2667 SDValue Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Sel2); in ExpandLegalINT_TO_FP()
2808 return DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT()
3299 Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Tmp1); in ExpandNode()
3302 Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), in ExpandNode()
4253 Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1)); in PromoteNode()
4288 TruncOp = ISD::TRUNCATE; in PromoteNode()
4319 TruncOp = ISD::TRUNCATE; in PromoteNode()
4337 TruncOp = ISD::TRUNCATE; in PromoteNode()
DLegalizeVectorOps.cpp296 case ISD::TRUNCATE: in LegalizeOp()
490 return DAG.getNode(ISD::TRUNCATE, SDLoc(Op), VT, promoted); in PromoteFP_TO_INT()
DFastISel.cpp332 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
1624 return selectCast(I, ISD::TRUNCATE); in selectOperator()
1635 return selectCast(I, ISD::TRUNCATE); in selectOperator()
DSelectionDAGDumper.cpp247 case ISD::TRUNCATE: return "truncate"; in getOperationName()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h398 TRUNCATE, enumerator
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1517 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, EltVT, Ret0); in LowerCall()
1545 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ret0); in LowerCall()
1547 Ret1 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ret1); in LowerCall()
1596 Elt = DAG.getNode(ISD::TRUNCATE, dl, EltVT, Elt); in LowerCall()
1643 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, Ins[i].VT, Ret0); in LowerCall()
1852 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Select); in LowerSelect()
1879 SDValue result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, newLD); in LowerLOADi1()
4213 DCI.DAG.getNode(ISD::TRUNCATE, DL, DemotedVT, LHS); in TryMULWIDECombine()
4215 DCI.DAG.getNode(ISD::TRUNCATE, DL, DemotedVT, RHS); in TryMULWIDECombine()
4365 Res = DAG.getNode(ISD::TRUNCATE, DL, ResVT.getVectorElementType(), Res); in ReplaceLoadVector()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp121 setOperationAction(ISD::TRUNCATE, MVT::i1, Custom); in PPCTargetLowering()
860 setTargetDAGCombine(ISD::TRUNCATE); in PPCTargetLowering()
2277 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Scc); in LowerSETCC()
2898 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgValue); in LowerFormalArguments_32SVR4()
3033 return DAG.getNode(ISD::TRUNCATE, dl, ObjectVT, ArgVal); in extendArgForPPC64()
3319 ArgVal = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, ArgVal); in LowerFormalArguments_64SVR4()
3664 ArgVal = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgVal); in LowerFormalArguments_Darwin()
4337 Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); in LowerCallResult()
4342 Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); in LowerCallResult()
4347 Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); in LowerCallResult()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp182 setOperationAction(ISD::TRUNCATE, MVT::v2i64, Expand); in InitAMDILLowering()
197 setOperationAction(ISD::TRUNCATE, MVT::v2f64, Expand); in InitAMDILLowering()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp815 Value = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Value); in convertLocVTToValVT()
1788 if (C.Op0.getOpcode() == ISD::TRUNCATE && in adjustICmpTruncate()
2130 Hi = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Hi); in lowerMUL_LOHI32()
2131 Lo = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Mul); in lowerMUL_LOHI32()
2683 return DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Shift); in lowerBITCAST()
2871 Op1 = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Op1); in lowerSDIVREM()
2954 SDValue Low32 = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, LowOp); in lowerOR()
3014 Op = DAG.getNode(ISD::TRUNCATE, DL, VT, Op); in lowerCTPOP()
3091 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP()
3195 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_CMP_SWAP()
[all …]
DSystemZISelDAGToDAG.cpp435 if (Opcode == ISD::TRUNCATE) { in expandAddress()
609 SDValue Trunc = CurDAG->getNode(ISD::TRUNCATE, DL, VT, Base); in getAddressOperands()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1982 E = DAG.getNode(ISD::TRUNCATE, DL, TyX, E); in lowerFCOPYSIGN64()
2003 SrlY = DAG.getNode(ISD::TRUNCATE, DL, TyX, SrlY); in lowerFCOPYSIGN64()
2859 Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val); in LowerCallResult()
2865 Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val); in LowerCallResult()
2871 Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val); in LowerCallResult()
2915 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val); in UnpackFromArgumentSlot()
2920 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val); in UnpackFromArgumentSlot()
2925 Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val); in UnpackFromArgumentSlot()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp464 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg); in LowerFormalArguments_32()
644 Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg); in LowerFormalArguments_64()
1366 RV = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), RV); in LowerCall_64()
2818 SDValue Src1Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src1); in LowerADDC_ADDE_SUBC_SUBE()
2821 Src1Hi = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src1Hi); in LowerADDC_ADDE_SUBC_SUBE()
2824 SDValue Src2Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src2); in LowerADDC_ADDE_SUBC_SUBE()
2827 Src2Hi = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src2Hi); in LowerADDC_ADDE_SUBC_SUBE()
/external/llvm/test/CodeGen/AArch64/
Drm_redundant_cmp.ll247 ; the operand of a set_cc is always a TRUNCATE.

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