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/external/libdrm/intel/tests/
Dgen7-3d.batch-ref.txt3 0x12300008: 0x00000000: dword 1
4 0x1230000c: 0x00000000: dword 2
5 0x12300010: 0x00000000: dword 3
7 0x12300018: 0x00000001: dword 1
9 0x12300020: 0x00000000: dword 1
54 0x123000d4: 0x00000000: dword 1
63 0x123000f8: 0x00000000: dword 1
64 0x123000fc: 0x00000000: dword 2
65 0x12300100: 0x00000000: dword 3
66 0x12300104: 0x00000000: dword 4
[all …]
Dgen6-3d.batch-ref.txt11 0x12300028: 0x00000000: dword 1
12 0x1230002c: 0x00000000: dword 2
14 0x12300034: 0x00000001: dword 1
16 0x1230003c: 0x00000000: dword 1
17 0x12300040: 0x00000000: dword 2
18 0x12300044: 0xffffffff: dword 3
20 0x1230004c: 0x20000000: dword 1
21 0x12300050: 0x00000000: dword 2
22 0x12300054: 0xffffffff: dword 3
24 0x1230005c: 0x40000000: dword 1
[all …]
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_debug_fp.c207 print_src_reg(GLuint dword) in print_src_reg() argument
209 GLuint nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK; in print_src_reg()
210 GLuint type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK; in print_src_reg()
212 print_reg_neg_swizzle(dword); in print_src_reg()
217 print_dest_reg(GLuint dword) in print_dest_reg() argument
219 GLuint nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK; in print_dest_reg()
220 GLuint type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK; in print_dest_reg()
222 if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL) in print_dest_reg()
225 if (dword & A0_DEST_CHANNEL_X) in print_dest_reg()
227 if (dword & A0_DEST_CHANNEL_Y) in print_dest_reg()
[all …]
/external/mesa3d/src/gallium/drivers/i915/
Di915_debug_fp.c222 print_src_reg(struct debug_stream *stream, unsigned dword) in print_src_reg() argument
224 unsigned nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK; in print_src_reg()
225 unsigned type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK; in print_src_reg()
227 print_reg_neg_swizzle(stream, dword); in print_src_reg()
232 print_dest_reg(struct debug_stream *stream, unsigned dword) in print_dest_reg() argument
234 unsigned nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK; in print_dest_reg()
235 unsigned type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK; in print_dest_reg()
237 if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL) in print_dest_reg()
240 if (dword & A0_DEST_CHANNEL_X) in print_dest_reg()
242 if (dword & A0_DEST_CHANNEL_Y) in print_dest_reg()
[all …]
Di915_batchbuffer.h51 unsigned dword) in i915_winsys_batchbuffer_dword_unchecked() argument
53 *(unsigned *)batch->ptr = dword; in i915_winsys_batchbuffer_dword_unchecked()
69 unsigned dword) in i915_winsys_batchbuffer_dword() argument
72 i915_winsys_batchbuffer_dword_unchecked(batch, dword); in i915_winsys_batchbuffer_dword()
/external/zlib/src/contrib/masmx86/
Dmatch686.asm42 cur_match equ dword ptr[esp+NbStack-0]
43 str_s equ dword ptr[esp+NbStack-4]
44 ; 5 dword on top (ret,ebp,esi,edi,ebx)
45 adrret equ dword ptr[esp+NbStack-8]
46 pushebp equ dword ptr[esp+NbStack-12]
47 pushedi equ dword ptr[esp+NbStack-16]
48 pushesi equ dword ptr[esp+NbStack-20]
49 pushebx equ dword ptr[esp+NbStack-24]
51 chain_length equ dword ptr [esp+NbStack-28]
52 limit equ dword ptr [esp+NbStack-32]
[all …]
/external/llvm/test/MC/X86/
Dintel-syntax-avx512.s270 vmovss dword ptr [rcx]{k2},xmm13
274 vmovss dword ptr [rax+r14*8+0x1234],xmm13
278 vmovss dword ptr [rdx+0x1fc],xmm13
282 vmovss dword ptr [rdx+0x200],xmm13
286 vmovss dword ptr [rdx-0x200],xmm13
290 vmovss dword ptr [rdx-0x204],xmm13
294 vmovss dword ptr [rdx+0x1fc],xmm5
298 vmovss dword ptr [rdx+0x200],xmm5
302 vmovss dword ptr [rdx-0x200], xmm5
306 vmovss dword ptr [rdx-0x204],xmm5
[all …]
Dintel-syntax.s622 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"
623 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL
628 inc dword ptr [rax]
637 dec dword ptr [rax]
646 add dword ptr [rax], 1
657 fstp dword ptr [rax]
674 fxsave dword ptr [eax]
675 fsave dword ptr [eax]
676 fxrstor dword ptr [eax]
677 frstor dword ptr [eax]
/external/libmpeg2/common/
Dimpeg2_macros.h41 #define MSW(dword) (dword >> 16) argument
42 #define LSW(dword) (dword & 0xFFFF) argument
/external/libdrm/intel/
Dintel_decode.c1792 int width, height, pitch, dword; in decode_3d_1d() local
1795 dword = data[i]; in decode_3d_1d()
1798 dword & (1 << 31) ? in decode_3d_1d()
1800 dword & (1 << 1) ? in decode_3d_1d()
1802 dword & (1 << 0) ? in decode_3d_1d()
1805 dword = data[i]; in decode_3d_1d()
1806 width = ((dword >> 10) & ((1 << 11) - 1)) + 1; in decode_3d_1d()
1807 height = ((dword >> 21) & ((1 << 11) - 1)) + 1; in decode_3d_1d()
1810 if (dword & (1 << 2)) in decode_3d_1d()
1812 else if (dword & (1 << 1)) in decode_3d_1d()
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.SI.load.dword.ll22 …%tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0,…
24 …%tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i…
26 …%tmp16 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i…
28 …%tmp18 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer…
31 …%tmp20 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer…
34 …%tmp22 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer…
43 declare i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
46 declare i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32…
/external/libvpx/libvpx/vpx_dsp/x86/
Dvariance_impl_mmx.asm53 movsxd rax, dword ptr [rsp]
54 movsxd rcx, dword ptr [rsp+4]
92 movsxd rcx, dword ptr arg(1) ;[source_stride]
93 movsxd rdx, dword ptr arg(3) ;[recon_stride]
295 mov dword ptr [rsi], eax
296 mov dword ptr [rdi], edx
335 movsxd rcx, dword ptr arg(1) ;[source_stride]
336 movsxd rdx, dword ptr arg(3) ;[recon_stride]
404 mov dword ptr [rsi], eax
405 mov dword ptr [rdi], edx
[all …]
Dsad_sse4.asm186 movsxd rax, dword ptr arg(1) ;src_stride
187 movsxd rdx, dword ptr arg(3) ;ref_stride
227 movsxd rax, dword ptr arg(1) ;src_stride
228 movsxd rdx, dword ptr arg(3) ;ref_stride
264 movsxd rax, dword ptr arg(1) ;src_stride
265 movsxd rdx, dword ptr arg(3) ;ref_stride
301 movsxd rax, dword ptr arg(1) ;src_stride
302 movsxd rdx, dword ptr arg(3) ;ref_stride
342 movsxd rax, dword ptr arg(1) ;src_stride
343 movsxd rdx, dword ptr arg(3) ;ref_stride
Dsad_mmx.asm36 movsxd rax, dword ptr arg(1) ;src_stride
37 movsxd rdx, dword ptr arg(3) ;ref_stride
128 movsxd rax, dword ptr arg(1) ;src_stride
129 movsxd rdx, dword ptr arg(3) ;ref_stride
200 movsxd rax, dword ptr arg(1) ;src_stride
201 movsxd rdx, dword ptr arg(3) ;ref_stride
270 movsxd rax, dword ptr arg(1) ;src_stride
271 movsxd rdx, dword ptr arg(3) ;ref_stride
359 movsxd rax, dword ptr arg(1) ;src_stride
360 movsxd rdx, dword ptr arg(3) ;ref_stride
Dvpx_convolve_copy_sse2.asm26 mov r4d, dword wm
47 mov r4d, dword hm
85 mov r4d, dword hm
108 mov r4d, dword hm
131 mov r4d, dword hm
157 mov r4d, dword hm
183 mov r4d, dword hm
Dhalfpix_variance_impl_sse2.asm36 movsxd rcx, dword ptr arg(4) ;height
37 movsxd rax, dword ptr arg(1) ;ref_stride
38 movsxd rdx, dword ptr arg(3) ;src_stride
149 movsxd rcx, dword ptr arg(4) ;height
150 movsxd rax, dword ptr arg(1) ;ref_stride
151 movsxd rdx, dword ptr arg(3) ;src_stride
254 movsxd rcx, dword ptr arg(4) ;height
255 movsxd rax, dword ptr arg(1) ;ref_stride
256 movsxd rdx, dword ptr arg(3) ;src_stride
/external/libvpx/libvpx/vp8/common/x86/
Dpostproc_sse2.asm144 cmp edx, dword arg(4) ;cols
166 movsxd rdx, dword arg(4)
196 cmp edx, dword arg(4) ;cols
205 cmp edx, dword arg(4)
211 mov eax, dword arg(3) ;dst_pixels_per_line
213 mov eax, dword arg(2) ;src_pixels_per_line
252 mov eax, dword ptr arg(4) ;flimit
264 add dword arg(2), 8
271 movsxd rax, dword ptr arg(1) ;pitch ;
443 cmp edx, dword arg(2) ;rows
[all …]
Dsubpixel_sse2.asm52 movsxd rcx, dword ptr arg(4) ;output_height
53 movsxd rax, dword ptr arg(2) ;src_pixels_per_line ; Pitch for Source
55 movsxd r8, dword ptr arg(5) ;output_width
172 movsxd rcx, dword ptr arg(4) ;output_height
173 movsxd rax, dword ptr arg(2) ;src_pixels_per_line ; Pitch for Source
175 movsxd r8, dword ptr arg(5) ;output_width
344 movsxd rdx, dword ptr arg(3) ;pixels_per_line
357 movsxd r8, dword ptr arg(2) ; dst_ptich
439 movsxd rdx, dword ptr arg(3) ;pixels_per_line
449 movsxd r8, dword ptr arg(2) ; dst_ptich
[all …]
Dpostproc_mmx.asm35 mov eax, dword ptr arg(4) ;flimit
45 add dword ptr arg(2), 8
52 movsxd rax, dword ptr arg(1) ;pitch ;
222 cmp edx, dword arg(2) ;rows
226 add dword arg(0), 4 ; s += 4
227 sub dword arg(3), 4 ; cols -= 4
228 cmp dword arg(3), 0
272 movsxd rcx, dword arg(5) ;[Width]
Dsubpixel_ssse3.asm66 movsxd rax, dword ptr arg(1) ;src_pixels_per_line
67 movsxd rcx, dword ptr arg(4) ;output_height
69 movsxd rdx, dword ptr arg(3) ;output_pitch
125 movsxd rax, dword ptr arg(1) ;src_pixels_per_line
126 movsxd rcx, dword ptr arg(4) ;output_height
128 movsxd rdx, dword ptr arg(3) ;output_pitch
206 movsxd rax, dword ptr arg(1) ;src_pixels_per_line
207 movsxd rcx, dword ptr arg(4) ;output_height
208 movsxd rdx, dword ptr arg(3) ;output_pitch
315 movsxd rax, dword ptr arg(1) ;src_pixels_per_line
[all …]
/external/llvm/test/CodeGen/X86/
Dfp_constant_op.ll10 ; CHECK: fadd dword ptr
17 ; CHECK: fmul dword ptr
24 ; CHECK: fadd dword ptr
38 ; CHECK: fdiv dword ptr
Dms-inline-asm.ll88 …call void asm sideeffect inteldialect "lea edi, dword ptr $0", "*m,~{edi},~{dirflag},~{fpsr},~{fla…
89 …call void asm sideeffect inteldialect "mov dword ptr $0, edi", "=*m,~{dirflag},~{fpsr},~{flags}"(i…
95 ; CHECK: lea edi, dword ptr [{{_?}}results]
100 ; CHECK: mov dword ptr [esp], edi
113 …call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i…
122 ; CHECK: mov dword ptr [esp], esp
132 …call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{eax},~{ebx},~{ecx},~{edx},~{edi},…
/external/clang/test/CodeGenObjC/
Dmisc-atomic-property.m39 typedef __int128_t dword; typedef
41 typedef long long int dword; typedef
47 dword dw;
50 @property(assign) dword dword_p;
/external/llvm/test/CodeGen/Mips/cconv/
Dreturn.ll21 @dword = global i64 zeroinitializer
55 %0 = load volatile i64, i64* @dword
61 ; O32-DAG: lw $2, %lo(dword)([[R1:\$[0-9]+]])
62 ; O32-DAG: addiu [[R2:\$[0-9]+]], [[R1]], %lo(dword)
64 ; N32-DAG: ld $2, %lo(dword)([[R1:\$[0-9]+]])
65 ; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(dword)([[R1:\$[0-9]+]])
/external/llvm/test/Instrumentation/AddressSanitizer/X86/
Dasm_cpuid.ll15 …si\0A\09mov eax, dword ptr $4\0A\09cpuid\0A\09mov dword ptr $0, eax\0A\09mov dword ptr $1, ebx\0A\…

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