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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
4
5
6define <16 x i32> @vpandd(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
7; ALL-LABEL: vpandd:
8; ALL:       ## BB#0: ## %entry
9; ALL-NEXT:    vpaddd {{.*}}(%rip){1to16}, %zmm0, %zmm0
10; ALL-NEXT:    vpandd %zmm1, %zmm0, %zmm0
11; ALL-NEXT:    retq
12entry:
13  ; Force the execution domain with an add.
14  %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
15                            i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
16  %x = and <16 x i32> %a2, %b
17  ret <16 x i32> %x
18}
19
20define <16 x i32> @vpord(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
21; ALL-LABEL: vpord:
22; ALL:       ## BB#0: ## %entry
23; ALL-NEXT:    vpaddd {{.*}}(%rip){1to16}, %zmm0, %zmm0
24; ALL-NEXT:    vpord %zmm1, %zmm0, %zmm0
25; ALL-NEXT:    retq
26entry:
27  ; Force the execution domain with an add.
28  %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
29                            i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
30  %x = or <16 x i32> %a2, %b
31  ret <16 x i32> %x
32}
33
34define <16 x i32> @vpxord(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
35; ALL-LABEL: vpxord:
36; ALL:       ## BB#0: ## %entry
37; ALL-NEXT:    vpaddd {{.*}}(%rip){1to16}, %zmm0, %zmm0
38; ALL-NEXT:    vpxord %zmm1, %zmm0, %zmm0
39; ALL-NEXT:    retq
40entry:
41  ; Force the execution domain with an add.
42  %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
43                            i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
44  %x = xor <16 x i32> %a2, %b
45  ret <16 x i32> %x
46}
47
48define <8 x i64> @vpandq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
49; ALL-LABEL: vpandq:
50; ALL:       ## BB#0: ## %entry
51; ALL-NEXT:    vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
52; ALL-NEXT:    vpandq %zmm1, %zmm0, %zmm0
53; ALL-NEXT:    retq
54entry:
55  ; Force the execution domain with an add.
56  %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
57  %x = and <8 x i64> %a2, %b
58  ret <8 x i64> %x
59}
60
61define <8 x i64> @vporq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
62; ALL-LABEL: vporq:
63; ALL:       ## BB#0: ## %entry
64; ALL-NEXT:    vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
65; ALL-NEXT:    vporq %zmm1, %zmm0, %zmm0
66; ALL-NEXT:    retq
67entry:
68  ; Force the execution domain with an add.
69  %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
70  %x = or <8 x i64> %a2, %b
71  ret <8 x i64> %x
72}
73
74define <8 x i64> @vpxorq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
75; ALL-LABEL: vpxorq:
76; ALL:       ## BB#0: ## %entry
77; ALL-NEXT:    vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
78; ALL-NEXT:    vpxorq %zmm1, %zmm0, %zmm0
79; ALL-NEXT:    retq
80entry:
81  ; Force the execution domain with an add.
82  %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
83  %x = xor <8 x i64> %a2, %b
84  ret <8 x i64> %x
85}
86
87
88define <8 x i64> @orq_broadcast(<8 x i64> %a) nounwind {
89; ALL-LABEL: orq_broadcast:
90; ALL:       ## BB#0:
91; ALL-NEXT:    vporq {{.*}}(%rip){1to8}, %zmm0, %zmm0
92; ALL-NEXT:    retq
93  %b = or <8 x i64> %a, <i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2>
94  ret <8 x i64> %b
95}
96
97define <16 x i32> @andd512fold(<16 x i32> %y, <16 x i32>* %x) {
98; ALL-LABEL: andd512fold:
99; ALL:       ## BB#0: ## %entry
100; ALL-NEXT:    vpandd (%rdi), %zmm0, %zmm0
101; ALL-NEXT:    retq
102entry:
103  %a = load <16 x i32>, <16 x i32>* %x, align 4
104  %b = and <16 x i32> %y, %a
105  ret <16 x i32> %b
106}
107
108define <8 x i64> @andqbrst(<8 x i64> %p1, i64* %ap) {
109; ALL-LABEL: andqbrst:
110; ALL:       ## BB#0: ## %entry
111; ALL-NEXT:    vpandq (%rdi){1to8}, %zmm0, %zmm0
112; ALL-NEXT:    retq
113entry:
114  %a = load i64, i64* %ap, align 8
115  %b = insertelement <8 x i64> undef, i64 %a, i32 0
116  %c = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
117  %d = and <8 x i64> %p1, %c
118  ret <8 x i64>%d
119}
120
121define <64 x i8> @and_v64i8(<64 x i8> %a, <64 x i8> %b) {
122; KNL-LABEL: and_v64i8:
123; KNL:       ## BB#0:
124; KNL-NEXT:    vandps %ymm2, %ymm0, %ymm0
125; KNL-NEXT:    vandps %ymm3, %ymm1, %ymm1
126; KNL-NEXT:    retq
127;
128; SKX-LABEL: and_v64i8:
129; SKX:       ## BB#0:
130; SKX-NEXT:    vpandq %zmm1, %zmm0, %zmm0
131; SKX-NEXT:    retq
132  %res = and <64 x i8> %a, %b
133  ret <64 x i8> %res
134}
135
136define <64 x i8> @or_v64i8(<64 x i8> %a, <64 x i8> %b) {
137; KNL-LABEL: or_v64i8:
138; KNL:       ## BB#0:
139; KNL-NEXT:    vorps %ymm2, %ymm0, %ymm0
140; KNL-NEXT:    vorps %ymm3, %ymm1, %ymm1
141; KNL-NEXT:    retq
142;
143; SKX-LABEL: or_v64i8:
144; SKX:       ## BB#0:
145; SKX-NEXT:    vporq %zmm1, %zmm0, %zmm0
146; SKX-NEXT:    retq
147  %res = or <64 x i8> %a, %b
148  ret <64 x i8> %res
149}
150
151define <64 x i8> @xor_v64i8(<64 x i8> %a, <64 x i8> %b) {
152; KNL-LABEL: xor_v64i8:
153; KNL:       ## BB#0:
154; KNL-NEXT:    vxorps %ymm2, %ymm0, %ymm0
155; KNL-NEXT:    vxorps %ymm3, %ymm1, %ymm1
156; KNL-NEXT:    retq
157;
158; SKX-LABEL: xor_v64i8:
159; SKX:       ## BB#0:
160; SKX-NEXT:    vpxorq %zmm1, %zmm0, %zmm0
161; SKX-NEXT:    retq
162  %res = xor <64 x i8> %a, %b
163  ret <64 x i8> %res
164}
165
166define <32 x i16> @and_v32i16(<32 x i16> %a, <32 x i16> %b) {
167; KNL-LABEL: and_v32i16:
168; KNL:       ## BB#0:
169; KNL-NEXT:    vandps %ymm2, %ymm0, %ymm0
170; KNL-NEXT:    vandps %ymm3, %ymm1, %ymm1
171; KNL-NEXT:    retq
172;
173; SKX-LABEL: and_v32i16:
174; SKX:       ## BB#0:
175; SKX-NEXT:    vpandq %zmm1, %zmm0, %zmm0
176; SKX-NEXT:    retq
177  %res = and <32 x i16> %a, %b
178  ret <32 x i16> %res
179}
180
181define <32 x i16> @or_v32i16(<32 x i16> %a, <32 x i16> %b) {
182; KNL-LABEL: or_v32i16:
183; KNL:       ## BB#0:
184; KNL-NEXT:    vorps %ymm2, %ymm0, %ymm0
185; KNL-NEXT:    vorps %ymm3, %ymm1, %ymm1
186; KNL-NEXT:    retq
187;
188; SKX-LABEL: or_v32i16:
189; SKX:       ## BB#0:
190; SKX-NEXT:    vporq %zmm1, %zmm0, %zmm0
191; SKX-NEXT:    retq
192  %res = or <32 x i16> %a, %b
193  ret <32 x i16> %res
194}
195
196define <32 x i16> @xor_v32i16(<32 x i16> %a, <32 x i16> %b) {
197; KNL-LABEL: xor_v32i16:
198; KNL:       ## BB#0:
199; KNL-NEXT:    vxorps %ymm2, %ymm0, %ymm0
200; KNL-NEXT:    vxorps %ymm3, %ymm1, %ymm1
201; KNL-NEXT:    retq
202;
203; SKX-LABEL: xor_v32i16:
204; SKX:       ## BB#0:
205; SKX-NEXT:    vpxorq %zmm1, %zmm0, %zmm0
206; SKX-NEXT:    retq
207  %res = xor <32 x i16> %a, %b
208  ret <32 x i16> %res
209}
210