| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 91 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR()
118 void Mips64Assembler::EmitRtd(int opcode, GpuRegister rt, GpuRegister rd, in EmitRtd()
131 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI()
179 void Mips64Assembler::Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Addu()
183 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addiu()
187 void Mips64Assembler::Daddu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Daddu()
191 void Mips64Assembler::Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Daddiu()
195 void Mips64Assembler::Subu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Subu()
199 void Mips64Assembler::Dsubu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Dsubu()
203 void Mips64Assembler::MulR6(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in MulR6()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 125 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR()
138 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI()
186 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { in Addu()
190 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { in Addiu()
194 void MipsAssembler::Subu(Register rd, Register rs, Register rt) { in Subu()
198 void MipsAssembler::MultR2(Register rs, Register rt) { in MultR2()
203 void MipsAssembler::MultuR2(Register rs, Register rt) { in MultuR2()
208 void MipsAssembler::DivR2(Register rs, Register rt) { in DivR2()
213 void MipsAssembler::DivuR2(Register rs, Register rt) { in DivuR2()
218 void MipsAssembler::MulR2(Register rd, Register rs, Register rt) { in MulR2()
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| /art/runtime/ |
| D | reference_table_test.cc | 35 ReferenceTable rt("test", 0, 11); in TEST_F() local
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| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 406 inline int16_t Thumb2Assembler::LdrLitEncoding16(Register rt, int32_t offset) { in LdrLitEncoding16()
413 inline int32_t Thumb2Assembler::LdrLitEncoding32(Register rt, int32_t offset) { in LdrLitEncoding32()
418 inline int32_t Thumb2Assembler::LdrdEncoding32(Register rt, Register rt2, Register rn, int32_t offs… in LdrdEncoding32()
449 inline int16_t Thumb2Assembler::LdrRtRnImm5Encoding16(Register rt, Register rn, int32_t offset) { in LdrRtRnImm5Encoding16()
473 inline int32_t Thumb2Assembler::LdrRtRnImm12Encoding(Register rt, Register rn, int32_t offset) { in LdrRtRnImm12Encoding()
2725 void Thumb2Assembler::ldrex(Register rt, Register rn, uint16_t imm, Condition cond) { in ldrex()
2740 void Thumb2Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
2746 Register rt, in strex()
2765 void Thumb2Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd()
2782 Register rt, in strex()
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| D | assembler_thumb2.h | 489 static Fixup LoadNarrowLiteral(uint32_t location, Register rt, Size size) { in LoadNarrowLiteral()
525 static Fixup LoadLiteralAddress(uint32_t location, Register rt, Size size) { in LoadLiteralAddress()
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| D | assembler_arm32.cc | 830 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
845 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd()
865 Register rt, in strex()
882 void Arm32Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) { in strexd()
921 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { in vmovsr()
936 void Arm32Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { in vmovrs()
951 void Arm32Assembler::vmovsrr(SRegister sm, Register rt, Register rt2, in vmovsrr()
972 void Arm32Assembler::vmovrrs(Register rt, Register rt2, SRegister sm, in vmovrrs()
994 void Arm32Assembler::vmovdrr(DRegister dm, Register rt, Register rt2, in vmovdrr()
1014 void Arm32Assembler::vmovrrd(Register rt, Register rt2, DRegister dm, in vmovrrd()
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| /art/disassembler/ |
| D | disassembler_mips.cc | 415 uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type. in Dump() local
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