| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 300 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
693 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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| D | X86MCCodeEmitter.cpp | 800 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
1048 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
1419 case X86II::MRM2m: case X86II::MRM3m: in encodeInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 412 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst),
414 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt),
416 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst),
418 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt),
420 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst),
422 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt),
424 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst),
426 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, u8imm:$cnt),
447 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst),
449 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst),
[all …]
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| D | X86InstrFPStack.td | 325 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">;
331 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">;
334 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">;
341 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
484 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst",
486 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst",
494 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst",
496 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst",
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| D | X86InstrControl.td | 207 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst),
215 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst),
287 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst),
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| D | X86InstrSystem.td | 414 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
416 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
418 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src),
428 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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| D | X86InstrArithmetic.td | 435 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst),
438 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst),
442 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst),
446 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst",
1205 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
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| D | X86InstrInfo.td | 2190 defm BLSMSK32 : bmi_bls<"blsmsk{l}", MRM2r, MRM2m, GR32, i32mem>;
2191 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2409 defm BLSFILL : tbm_binary_intr<0x01, "blsfill", MRM2r, MRM2m>;
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| D | X86InstrFormats.td | 33 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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| D | X86InstrAVX512.td | 4085 defm VPSRL : avx512_shift_rmi_dq<0x72, 0x73, MRM2r, MRM2m, "vpsrl", X86vsrli>,
4086 avx512_shift_rmi_w<0x71, MRM2r, MRM2m, "vpsrlw", X86vsrli>, AVX512BIi8Base, EVEX_4V;
6536 defm VGATHERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dps",
6539 defm VGATHERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qps",
6542 defm VGATHERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dpd",
6545 defm VGATHERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qpd",
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| D | X86InstrSSE.td | 3710 def PREFETCHT1 : I<0x18, MRM2m, (outs), (ins i8mem:$src),
3758 def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src),
3766 def LDMXCSR : I<0xAE, MRM2m, (outs), (ins i32mem:$src),
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
743 case X86Local::MRM2m: in emitInstructionSpecifier()
860 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
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| /external/llvm/test/TableGen/ |
| D | TargetInstrInfo.td | 55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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| /external/llvm/docs/TableGen/ |
| D | LangIntro.rst | 549 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1827 case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and
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