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Searched refs:ORI (Results 1 – 25 of 38) sorted by relevance

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/external/pcre/dist/sljit/
DsljitNativePPC_64.c55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
77 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp >> 32))); in load_immediate()
89 return push_inst(compiler, ORI | S(reg) | A(reg) | tmp2); in load_immediate()
96 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp2)) : SLJIT_SUCCESS; in load_immediate()
107 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | (tmp2 >> 48))); in load_immediate()
113 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm >> 32))); in load_immediate()
116 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)); in load_immediate()
312 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
320 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
[all …]
DsljitNativeMIPS_64.c38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
45 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
81 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar)); in load_immediate()
89 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
114 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
118 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
234 …FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM((op & SLJIT_INT_OP) ? 32 : 64), UNMOVABLE_I… in emit_single_op()
257 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG)); in emit_single_op()
293 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG)); in emit_single_op()
415 EMIT_LOGICAL(ORI, OR); in emit_single_op()
[all …]
DsljitNativePPC_32.c35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
185 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
193 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
250 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(init_value)); in emit_const()
DsljitNativeMIPS_32.c32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
38 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
142 FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
165 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG)); in emit_single_op()
201 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG)); in emit_single_op()
320 EMIT_LOGICAL(ORI, OR); in emit_single_op()
347 return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst)); in emit_const()
DsljitNativeTILEGX_64.c424 #define ORI(dst, srca, imm) \ macro
1673 FAIL_IF(ORI(ULESS_FLAG ,reg_map[src1], src2)); in emit_single_op()
1735 FAIL_IF(ORI(TMP_EREG1, reg_map[src1], src2)); in emit_single_op()
/external/valgrind/none/tests/mips64/
Dlogical_instructions.c7 OR, ORI, XOR, XORI enumerator
68 case ORI: in main()
/external/v8/src/mips64/
Dassembler-mips64-inl.h360 (instr1 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
362 (instr3 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
Dconstants-mips64.h328 ORI = ((1U << 3) + 5) << kOpcodeShift, enumerator
942 OpcodeToBitNumber(ORI) | OpcodeToBitNumber(XORI) |
Dassembler-mips64.cc562 return opcode == ORI; in IsOri()
1760 GenInstrImmediate(ORI, rs, rt, j); in ori()
3313 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at()
3314 (GetOpcodeField(instr3) == ORI)) { in target_address_at()
3369 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_address_at()
3370 GetOpcodeField(instr3) == ORI)); in set_target_address_at()
3379 *(p + 1) = ORI | (rt_code << kRtShift) | (rt_code << kRsShift) in set_target_address_at()
3381 *(p + 3) = ORI | (rt_code << kRsShift) | (rt_code << kRtShift) in set_target_address_at()
Ddisasm-mips64.cc1759 case ORI: in DecodeTypeImmediate()
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp353 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
357 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
379 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
689 : PPC::ORI ); in emitPrologue()
1024 : PPC::ORI ); in emitEpilogue()
1665 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI; in eliminateCallFramePseudoInstr()
DPPCFastISel.cpp1213 Opc = PPC::ORI; in SelectBinaryIntOp()
2010 TII.get(IsGPRC ? PPC::ORI : PPC::ORI8), ResultReg) in PPCMaterialize32BitInt()
DPPCRegisterInfo.cpp866 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg) in eliminateFrameIndex()
DPPCISelDAGToDAG.cpp3976 if (Op32.getMachineOpcode() == PPC::ORI || in PeepholePPC64ZExtGather()
4134 case PPC::ORI: NewOpcode = PPC::ORI8; break; in PeepholePPC64ZExt()
/external/v8/src/ppc/
Dconstants-ppc.h114 ORI = 24 << 26, // OR Immediate enumerator
Dassembler-ppc-inl.h348 ((instr0 & kOpcodeMask) == ADDIS && (instr1 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
350 (instr3 & kOpcodeMask) == ORIS && (instr4 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
Dassembler-ppc.cc271 bool Assembler::IsOri(Instr instr) { return (instr & kOpcodeMask) == ORI; } in IsOri()
430 instr = ORI; // nop: ori, 0,0,0 in target_at_put()
443 instr = ORI; // nop: ori, 0,0,0 in target_at_put()
950 d_form(ORI, rs, ra, imm.imm_, false); in ori()
2319 return instr == (ORI | reg * B21 | reg * B16); in IsNop()
Ddisasm-ppc.cc1220 case ORI: { in InstructionDecode()
Dsimulator-ppc.cc43 static const Instr kNopInstr = (ORI); // ori, 0,0,0
3491 case ORI: { in ExecuteGeneric()
/external/v8/src/mips/
Dconstants-mips.h344 ORI = ((1U << 3) + 5) << kOpcodeShift, enumerator
895 OpcodeToBitNumber(ANDI) | OpcodeToBitNumber(ORI) |
Dassembler-mips-inl.h359 (instr1 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
Dassembler-mips.cc594 return opcode == ORI; in IsOri()
1632 GenInstrImmediate(ORI, rs, rt, j); in ori()
3003 if ((GetOpcodeField(instr1) == LUI) && (GetOpcodeField(instr2) == ORI)) { in target_address_at()
3042 CHECK((GetOpcodeField(instr1) == LUI && GetOpcodeField(instr2) == ORI)); in set_target_address_at()
3049 *(p + 1) = ORI | rt_code | (rt_code << 5) | (itarget & kImm16Mask); in set_target_address_at()
Ddisasm-mips.cc1539 case ORI: in DecodeTypeImmediate()
/external/icu/icu4c/source/common/
Ducnvisci.c92 ORI = 0x47, enumerator
145 { ORIYA, ORI_MASK, ORI },
/external/icu/icu4j/main/classes/charset/src/com/ibm/icu/charset/
DCharsetISCII.java84 static final short ORI = 0x47; field in CharsetISCII.ISCIILang
166 new LookupDataStruct(UniLang.ORIYA, MaskEnum.ORI_MASK, ISCIILang.ORI),

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