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Searched refs:SBC (Results 1 – 25 of 28) sorted by relevance

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/external/v8/src/arm/
Dconstants-arm.h147 SBC = 6 << 21, // Subtract with Carry. enumerator
Ddisasm-arm.cc880 case SBC: { in DecodeType01()
Dsimulator-arm.cc2421 case SBC: { in DecodeType01()
Dassembler-arm.cc1457 addrmod1(cond | SBC | s, src1, dst, src2); in sbc()
/external/llvm/test/MC/Disassembler/ARM/
Dthumb1.txt369 # SBC
Dthumb2.txt1607 # SBC (immediate)
1631 # SBC (register)
Dbasic-arm-instructions.txt1439 # SBC
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h53 SBC, // adc, sbc instructions enumerator
DAArch64SchedCyclone.td139 // ADC(S),SBC(S)
DAArch64InstrInfo.td176 def AArch64sbc : SDNode<"AArch64ISD::SBC", SDTBinaryArithWithFlagsIn>;
593 defm SBC : AddSubCarry<1, "sbc", "sbcs", AArch64sbc, AArch64sbc_flag>;
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h256 AddSubWithCarryMacro(rd, rn, operand, LeaveFlags, SBC); in Sbc()
265 AddSubWithCarryMacro(rd, rn, operand, SetFlags, SBC); in Sbcs()
Dconstants-arm64.h487 SBC = SBC_w, enumerator
Dassembler-arm64.cc1161 AddSubWithCarry(rd, rn, operand, LeaveFlags, SBC); in sbc()
1168 AddSubWithCarry(rd, rn, operand, SetFlags, SBC); in sbcs()
/external/llvm/test/MC/ARM/
Dbasic-thumb-instructions.s500 @ SBC
Dthumb2-narrow-dp.ll573 // SBC
579 SBC r0, r1, r0 // Must use wide encoding as not flag-setting
Dbasic-thumb2-instructions.s2111 @ SBC (immediate)
2135 @ SBC (register)
Dbasic-arm-instructions.s2192 @ SBC
Dv8_IT_manual.s220 @ SBC reg, encoding T1
224 @ SBC reg, encoding T2 (32-bit)
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.cc1432 AddSubWithCarryMacro(rd, rn, operand, LeaveFlags, SBC); in Sbc()
1440 AddSubWithCarryMacro(rd, rn, operand, SetFlags, SBC); in Sbcs()
Dconstants-a64.h514 SBC = SBC_w, enumerator
Dassembler-a64.cc964 AddSubWithCarry(rd, rn, operand, LeaveFlags, SBC); in sbc()
971 AddSubWithCarry(rd, rn, operand, SetFlags, SBC); in sbcs()
/external/pcre/dist/sljit/
DsljitNativeARM_64.c106 #define SBC 0xda000000 macro
726 return push_inst(compiler, (SBC ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2)); in emit_op_imm()
/external/llvm/lib/Target/ARM/
DARMScheduleSwift.td127 // ADC,ADD,NEG,RSB,RSC,SBC,SUB,ADR
DARMInstrThumb2.td4399 // Aliases for SBC without the ".w" optional width specifier.
/external/vixl/doc/
Dsupported-instructions.md989 ### SBC ### subsection

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