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Searched refs:TheDef (Results 1 – 24 of 24) sorted by relevance

/external/llvm/utils/TableGen/
DAsmWriterInst.cpp98 CGI.TheDef->getName() + "'!"); in AsmWriterInst()
137 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
144 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
152 PrintFatalError("Bad operand modifier name in '"+ CGI.TheDef->getName() + "'"); in AsmWriterInst()
157 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
161 PrintFatalError("Stray '$' in '" + CGI.TheDef->getName() + in AsmWriterInst()
DAsmMatcherEmitter.cpp417 Record *const TheDef; member
459 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI), in MatchableInfo()
464 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef), in MatchableInfo()
467 TheDef->getValueAsBit("UseInstAsmMatchConverter")) { in MatchableInfo()
475 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands), in MatchableInfo()
605 Record *TheDef; member
610 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {} in SubtargetFeatureInfo()
614 return "Feature_" + TheDef->getName(); in getEnumName()
619 TheDef->dump(); in dump()
726 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; in dump()
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DInstrInfoEmitter.cpp208 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) in initOperandMapData()
220 OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName()); in initOperandMapData()
362 Record *Inst = II->TheDef; in run()
390 InstrNames.add(Inst->TheDef->getName()); in run()
408 OS << InstrNames.get(Inst->TheDef->getName()) << "U, "; in run()
476 << Inst.TheDef->getValueAsInt("Size") << ",\t" in emitRecord()
514 BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); in emitRecord()
522 PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName()); in emitRecord()
529 std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); in emitRecord()
535 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); in emitRecord()
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DCodeGenSchedule.cpp73 if (R.match(Inst->TheDef->getName())) in apply()
74 Elts.insert(Inst->TheDef); in apply()
208 Record *SchedDef = Inst->TheDef; in collectSchedRW()
287 findRWs(WI->TheDef->getValueAsListOfDefs("Writes"), WI->Sequence, in collectSchedRW()
340 if (I->TheDef == Def) in getSchedRWIdx()
348 Record *ReadDef = SchedReads[i].TheDef; in hasReadOfWrite()
403 SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1; in expandRWSequence()
429 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in expandRWSeqForProc()
432 AliasDef = AliasRW.TheDef; in expandRWSeqForProc()
444 SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1; in expandRWSeqForProc()
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DAsmWriterEmitter.cpp111 << FirstInst.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
114 << SimilarInsts[i].CGI->TheDef->getName() << ":\n"; in EmitInstructions()
125 FirstInst.CGI->TheDef->getName(), in EmitInstructions()
131 AWI.CGI->TheDef->getName(), in EmitInstructions()
175 InstrsForCase[idx] += Inst->CGI->TheDef->getName(); in FindUniqueOperandCommands()
182 InstrsForCase.push_back(Inst->CGI->TheDef->getName()); in FindUniqueOperandCommands()
401 << NumberedInstructions->at(i)->TheDef->getName() << "\n"; in EmitPrintInstruction()
415 << NumberedInstructions->at(i)->TheDef->getName() << "\n"; in EmitPrintInstruction()
540 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
546 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices"); in emitRegisterNameString()
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DCodeGenSchedule.h49 Record *TheDef; member
59 : Index(0), TheDef(nullptr), IsRead(false), IsAlias(false), in CodeGenSchedRW()
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { in CodeGenSchedRW()
77 : Index(Idx), Name(Name), TheDef(nullptr), IsRead(Read), IsAlias(false), in CodeGenSchedRW()
83 assert((!HasVariants || TheDef) && "Variant write needs record def"); in isValid()
88 return TheDef || !Sequence.empty(); in isValid()
DSubtargetEmitter.cpp659 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
660 return SchedWrite.TheDef; in FindWriteResources()
667 if (AliasRW.TheDef->getValueInit("SchedModel")->isComplete()) { in FindWriteResources()
668 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel"); in FindWriteResources()
673 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in FindWriteResources()
676 AliasDef = AliasRW.TheDef; in FindWriteResources()
688 || SchedWrite.TheDef == (*WRI)->getValueAsDef("WriteType")) { in FindWriteResources()
702 + SchedWrite.TheDef->getName()); in FindWriteResources()
712 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
713 return SchedRead.TheDef; in FindReadAdvance()
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DCodeGenRegisters.cpp34 : TheDef(R), EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
44 : TheDef(nullptr), Name(N), Namespace(Nspace), Size(-1), Offset(-1), in CodeGenSubRegIndex()
57 if (!TheDef) in updateComponents()
60 std::vector<Record*> Comps = TheDef->getValueAsListOfDefs("ComposedOf"); in updateComponents()
63 PrintFatalError(TheDef->getLoc(), in updateComponents()
69 PrintFatalError(TheDef->getLoc(), "Ambiguous ComposedOf entries"); in updateComponents()
73 TheDef->getValueAsListOfDefs("CoveringSubRegIndices"); in updateComponents()
76 PrintFatalError(TheDef->getLoc(), in updateComponents()
107 : TheDef(R), in CodeGenRegister()
118 std::vector<Record*> SRIs = TheDef->getValueAsListOfDefs("SubRegIndices"); in buildObjectGraph()
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DCodeGenInstruction.cpp28 CGIOperandList::CGIOperandList(Record *R) : TheDef(R) { in CGIOperandList()
139 PrintFatalError("'" + TheDef->getName() + in getOperandNamed()
159 PrintFatalError(TheDef->getName() + ": Illegal operand name: '" + Op + "'"); in ParseOperandName()
169 PrintFatalError(TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"); in ParseOperandName()
179 PrintFatalError(TheDef->getName() + ": Illegal to refer to" in ParseOperandName()
189 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
197 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
296 : TheDef(R), Operands(R), InferredFrom(nullptr) { in CodeGenInstruction()
576 : TheDef(R) { in CodeGenInstAlias()
DCodeGenInstruction.h129 Record *TheDef; // The actual record containing this OperandList. variable
209 Record *TheDef; // The actual record defining this instruction.
292 Record *TheDef; // The actual record defining this InstAlias.
DFixedLenDecoderEmitter.cpp368 BitsInit &Bits = getBitsField(*AllInstructions[Opcode]->TheDef, "Inst"); in insnWithID()
376 AllInstructions[Opcode]->TheDef->getValueAsBitsInit("SoftFail"); in insnWithID()
388 return AllInstructions[Opcode]->TheDef->getName(); in nameWithID()
809 << NumberedInstructions->at(Opc)->TheDef->getName() << "\n"; in emitTable()
824 << NumberedInstructions->at(Opc)->TheDef->getName() in emitTable()
993 getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst")); in SingletonExists()
1151 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); in emitPredicateMatch()
1181 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); in doesOpcodeNeedPredicate()
1247 AllInstructions[Opc]->TheDef->getValueAsBitsInit("SoftFail"); in emitSoftFailTableEntry()
1249 BitsInit *InstBits = AllInstructions[Opc]->TheDef->getValueAsBitsInit("Inst"); in emitSoftFailTableEntry()
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DRegisterInfoEmitter.cpp79 Registers.front().TheDef->getValueAsString("Namespace"); in runEnums()
329 Record *Reg = RE.TheDef; in EmitRegMappingTables()
347 std::string Namespace = Regs.front().TheDef->getValueAsString("Namespace"); in EmitRegMappingTables()
396 Record *Reg = RE.TheDef; in EmitRegMappingTables()
449 Record *Reg = RE.TheDef; in EmitRegMapping()
457 std::string Namespace = Regs.front().TheDef->getValueAsString("Namespace"); in EmitRegMapping()
942 OS << " { " << getQualifiedName(Roots.front()->TheDef); in runMCDesc()
944 OS << ", " << getQualifiedName(Roots[r]->TheDef); in runMCDesc()
1024 Record *Reg = RE.TheDef; in runMCDesc()
1329 << int(AllocatableRegs.count(Reg.TheDef)) << " },\n"; in runTargetDesc()
DCodeGenRegisters.h55 Record *const TheDef; variable
128 Record *TheDef; member
276 Record *TheDef; variable
317 Record *getDef() const { return TheDef; } in getDef()
DCodeGenIntrinsics.h27 Record *TheDef; // The actual record defining this intrinsic. member
DCodeGenDAGPatterns.h771 if (Intrinsics[i].TheDef == R) return Intrinsics[i]; in getIntrinsic()
773 if (TgtIntrinsics[i].TheDef == R) return TgtIntrinsics[i]; in getIntrinsic()
787 if (Intrinsics[i].TheDef == R) return i; in getIntrinsicID()
789 if (TgtIntrinsics[i].TheDef == R) return i + Intrinsics.size(); in getIntrinsicID()
DPseudoLoweringEmitter.cpp212 << Source.TheDef->getName() << ": {\n" in emitLoweringEmitter()
216 << Dest.TheDef->getName() << ");\n"; in emitLoweringEmitter()
DCodeGenTarget.cpp333 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); in ComputeInstrsByEnum()
449 TheDef = R; in CodeGenIntrinsic()
DCodeEmitterGen.cpp246 Record *R = CGI->TheDef; in run()
DIntrinsicEmitter.cpp738 PrintFatalError("Intrinsic '" + Ints[i].TheDef->getName() + in EmitIntrinsicToGCCBuiltinMap()
794 PrintFatalError("Intrinsic '" + Intrinsic.TheDef->getName() + "': " in EmitIntrinsicToMSBuiltinMap()
DDAGISelMatcherEmitter.cpp478 OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n"; in EmitMatcher()
483 OS << getQualifiedName(Reg->TheDef) << ",\n"; in EmitMatcher()
DCodeGenDAGPatterns.cpp2951 assert(!DAGInsts.count(CGI.TheDef) && "Instruction already parsed!"); in parseInstructionPattern()
2954 TreePattern *I = new TreePattern(CGI.TheDef, Pat, true, *this); in parseInstructionPattern()
3263 const TreePattern *Pattern = getInstruction(InstInfo.TheDef).getPattern(); in InferInstructionFlags()
3271 Errors += InferFromPattern(InstInfo, PatInfo, InstInfo.TheDef); in InferInstructionFlags()
3319 PrintError(InstInfo->TheDef->getLoc(), in InferInstructionFlags()
3322 PrintError(InstInfo->TheDef->getLoc(), in InferInstructionFlags()
3325 PrintError(InstInfo->TheDef->getLoc(), in InferInstructionFlags()
3388 InstInfo.InferredFrom != InstInfo.TheDef && in VerifyInstructionFlags()
DCodeGenMapTable.cpp371 Record *CurInstr = NumberedInstructions[i]->TheDef; in emitBinSearchTable()
DX86RecognizableInstr.cpp196 Rec = insn.TheDef; in RecognizableInstr()
270 if (insn.TheDef->getValueAsBit("isAsmParserOnly")) in processInstr()
DDAGISelMatcherGen.cpp897 AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName(), in EmitResultInstructionAsOperand()