| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.h | 65 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | SparcInstrInfo.cpp | 65 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SparcInstrInfo
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.h | 50 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | XCoreInstrInfo.cpp | 85 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in XCoreInstrInfo
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.h | 43 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | Mips16InstrInfo.h | 43 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | Mips16InstrInfo.cpp | 56 unsigned Mips16InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in Mips16InstrInfo
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| D | MipsSEInstrInfo.cpp | 63 unsigned MipsSEInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in MipsSEInstrInfo
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 142 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | SystemZInstrInfo.cpp | 217 unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SystemZInstrInfo
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 157 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | README_ALTIVEC.txt | 3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
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| D | PPCInstrInfo.cpp | 290 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in PPCInstrInfo
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 61 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | AArch64InstrInfo.cpp | 1208 unsigned AArch64InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in AArch64InstrInfo
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 54 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | HexagonInstrInfo.cpp | 258 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in HexagonInstrInfo
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| /external/llvm/lib/CodeGen/ |
| D | InlineSpiller.cpp | 257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
805 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
1020 InstrReg = TII.isStoreToStackSlot(MI, FI); in coalesceStackAccess()
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| D | StackSlotColoring.cpp | 403 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue; in RemoveDeadStores()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 208 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | X86FrameLowering.cpp | 1286 if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) { in emitPrologue()
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| D | X86InstrInfo.cpp | 2246 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in X86InstrInfo
2259 if ((Reg = isStoreToStackSlot(MI, FrameIndex))) in isStoreToStackSlotPostFE()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 163 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| D | ARMBaseInstrInfo.cpp | 980 ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in ARMBaseInstrInfo
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 205 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function
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