| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state_draw.c | 43 struct si_pm4_state *pm4; in si_pipe_shader_vs() local
51 si_pm4_delete_state(rctx, vs, shader->pm4); in si_pipe_shader_vs()
52 pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); in si_pipe_shader_vs()
54 si_pm4_inval_shader_cache(pm4); in si_pipe_shader_vs()
67 si_pm4_set_reg(pm4, R_0286C4_SPI_VS_OUT_CONFIG, in si_pipe_shader_vs()
70 si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT, in si_pipe_shader_vs()
77 si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ); in si_pipe_shader_vs()
78 si_pm4_set_reg(pm4, R_00B120_SPI_SHADER_PGM_LO_VS, va >> 8); in si_pipe_shader_vs()
79 si_pm4_set_reg(pm4, R_00B124_SPI_SHADER_PGM_HI_VS, va >> 40); in si_pipe_shader_vs()
89 si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, in si_pipe_shader_vs()
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| D | si_state.c | 42 struct si_pm4_state *pm4; in si_update_fb_blend_state() local
49 pm4 = CALLOC_STRUCT(si_pm4_state); in si_update_fb_blend_state()
50 if (pm4 == NULL) in si_update_fb_blend_state()
55 si_pm4_set_reg(pm4, R_028238_CB_TARGET_MASK, mask); in si_update_fb_blend_state()
57 si_pm4_set_state(rctx, fb_blend, pm4); in si_update_fb_blend_state()
138 struct si_pm4_state *pm4 = &blend->pm4; in si_create_blend_state() local
151 si_pm4_set_reg(pm4, R_028808_CB_COLOR_CONTROL, color_control); in si_create_blend_state()
153 si_pm4_set_reg(pm4, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, ~0); in si_create_blend_state()
154 si_pm4_set_reg(pm4, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, ~0); in si_create_blend_state()
174 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl); in si_create_blend_state()
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| D | si_commands.c | 31 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl) in si_cmd_surface_sync() argument
33 si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC); in si_cmd_surface_sync()
34 si_pm4_cmd_add(pm4, cp_coher_cntl); /* CP_COHER_CNTL */ in si_cmd_surface_sync()
35 si_pm4_cmd_add(pm4, 0xffffffff); /* CP_COHER_SIZE */ in si_cmd_surface_sync()
36 si_pm4_cmd_add(pm4, 0); /* CP_COHER_BASE */ in si_cmd_surface_sync()
37 si_pm4_cmd_add(pm4, 0x0000000A); /* POLL_INTERVAL */ in si_cmd_surface_sync()
38 si_pm4_cmd_end(pm4, false); in si_cmd_surface_sync()
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| D | si_state.h | 33 struct si_pm4_state pm4; member
39 struct si_pm4_state pm4; member
44 struct si_pm4_state pm4; member
56 struct si_pm4_state pm4; member
159 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl);
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| D | radeonsi_pm4.c | 43 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
50 state->pm4[state->last_pm4] = PKT3(state->last_opcode, in si_pm4_cmd_end()
213 memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4); in si_pm4_emit()
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| D | radeonsi_shader.h | 75 struct si_pm4_state *pm4; member
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| D | r600_hw_context.c | 158 struct si_pm4_state *pm4; in r600_flush_framebuffer() local
163 pm4 = CALLOC_STRUCT(si_pm4_state); in r600_flush_framebuffer()
164 si_cmd_surface_sync(pm4, S_0085F0_CB0_DEST_BASE_ENA(1) | in r600_flush_framebuffer()
174 si_pm4_emit(ctx, pm4); in r600_flush_framebuffer()
175 si_pm4_free_state(ctx, pm4, ~0); in r600_flush_framebuffer()
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| D | radeonsi_pm4.h | 51 uint32_t pm4[SI_PM4_MAX_DW]; member
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| /external/libdrm/tests/amdgpu/ |
| D | basic_tests.c | 495 uint32_t *pm4; in amdgpu_command_submission_sdma_write_linear() local
504 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_sdma_write_linear()
505 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_sdma_write_linear()
538 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in amdgpu_command_submission_sdma_write_linear()
540 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_command_submission_sdma_write_linear()
541 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_sdma_write_linear()
542 pm4[i++] = sdma_write_length; in amdgpu_command_submission_sdma_write_linear()
544 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_sdma_write_linear()
547 i, pm4, in amdgpu_command_submission_sdma_write_linear()
566 free(pm4); in amdgpu_command_submission_sdma_write_linear()
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| /external/skia/tests/ |
| D | SkColor4fTest.cpp | 62 SkPM4f pm4 = c4.premul(); in DEF_TEST() local
63 REPORTER_ASSERT(reporter, pm4.fVec[SK_A_INDEX] == c4.fA); in DEF_TEST()
64 REPORTER_ASSERT(reporter, pm4.fVec[SK_R_INDEX] == c4.fA * c4.fR); in DEF_TEST()
65 REPORTER_ASSERT(reporter, pm4.fVec[SK_G_INDEX] == c4.fA * c4.fG); in DEF_TEST()
66 REPORTER_ASSERT(reporter, pm4.fVec[SK_B_INDEX] == c4.fA * c4.fB); in DEF_TEST()
71 pm4 = c4.premul(); in DEF_TEST()
72 REPORTER_ASSERT(reporter, pm4.fVec[SK_A_INDEX] == c4.fA); in DEF_TEST()
73 REPORTER_ASSERT(reporter, nearly_equal(pm4.fVec[SK_R_INDEX], c4.fA * c4.fR)); in DEF_TEST()
74 REPORTER_ASSERT(reporter, nearly_equal(pm4.fVec[SK_G_INDEX], c4.fA * c4.fG)); in DEF_TEST()
75 REPORTER_ASSERT(reporter, nearly_equal(pm4.fVec[SK_B_INDEX], c4.fA * c4.fB)); in DEF_TEST()
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| D | Float16Test.cpp | 51 SkPM4f pm4 = SkPM4f::FromF16(pm.addrF16(x, y)); in DEF_TEST() local
52 REPORTER_ASSERT(reporter, eq_within_half_float(origpm4, pm4)); in DEF_TEST()
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| /external/skia/src/core/ |
| D | SkColor.cpp | 182 SkPM4f pm4; in premul() local
183 dst.store(&pm4); in premul()
184 return pm4; in premul()
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| D | SkXfermode.cpp | 920 SkPM4f pm4; in as_pm4f() local
921 x.store(pm4.fVec); in as_pm4f()
922 return pm4; in as_pm4f()
925 static Sk4f as_4f(const SkPM4f& pm4) { in as_4f() argument
926 return Sk4f::Load(pm4.fVec); in as_4f()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_hw_context.c | 142 block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0); in r600_init_block()
143 block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2; in r600_init_block()
144 block->reg = &block->pm4[block->pm4_ndwords]; in r600_init_block()
170 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0); in r600_init_block()
171 block->pm4[block->pm4_ndwords++] = 0x00000000; in r600_init_block()
176 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0); in r600_init_block()
177 block->pm4[block->pm4_ndwords++] = reg[i+j].sbu_flags; in r600_init_block()
829 block->pm4[reloc->bo_pm4_index] = in r600_context_block_emit_dirty()
832 block->pm4[reloc->bo_pm4_index] = 0; in r600_context_block_emit_dirty()
848 memcpy(&cs->buf[cs->cdw], block->pm4, cp_dwords * 4); in r600_context_block_emit_dirty()
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| D | r600.h | 140 uint32_t pm4[R600_BLOCK_MAX_REG]; member
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| /external/clang/test/CXX/temp/temp.arg/temp.arg.nontype/ |
| D | p1-11.cpp | 43 PM<(int X::*)0> pm4; variable
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| /external/chromium-trace/catapult/tracing/test_data/ |
| D | ddms_calculator_start.trace | 52406 ���pm4��Z��
112633 �@�pm4��x
139454 ���pm4��� ��
153727 ���pm4 �C� ��
347344 h`�pm4�])��
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