/external/fio/engines/ |
D | rdma.c | 121 struct rdmaio_data *rd = td->io_ops->data; in client_recv() local 123 if (wc->byte_len != sizeof(rd->recv_buf)) { in client_recv() 129 if ((rd->rdma_protocol == FIO_RDMA_MEM_WRITE) || in client_recv() 130 (rd->rdma_protocol == FIO_RDMA_MEM_READ)) { in client_recv() 134 rd->rmt_nr = ntohl(rd->recv_buf.nr); in client_recv() 136 for (i = 0; i < rd->rmt_nr; i++) { in client_recv() 137 rd->rmt_us[i].buf = ntohll(rd->recv_buf.rmt_us[i].buf); in client_recv() 138 rd->rmt_us[i].rkey = ntohl(rd->recv_buf.rmt_us[i].rkey); in client_recv() 139 rd->rmt_us[i].size = ntohl(rd->recv_buf.rmt_us[i].size); in client_recv() 143 " len %d from peer\n", rd->rmt_us[i].rkey, in client_recv() [all …]
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/external/valgrind/none/tests/mips64/ |
D | cvm_atomic.stdout.exp-LE | 1 baddu $t3, $t1, $t2 :: rd 0x4, rs 0x42b0c0a28677b502, rt 0x42b0c0a28677b502 2 baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x42b0c0a28677b502, rt 0x9e705cc51ad8dca0 3 baddu $t3, $t1, $t2 :: rd 0x82, rs 0x42b0c0a28677b502, rt 0x47f505569a08a180 4 baddu $t3, $t1, $t2 :: rd 0x99, rs 0x42b0c0a28677b502, rt 0x94ff52fc81afa797 5 baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x42b0c0a28677b502, rt 0x556b3ecaccf17ac5 6 baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x3c2cd9a9cda20766 7 baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0xd0d070db710cd036 8 baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x42b0c0a28677b502, rt 0x2f39454412d6e4a7 9 baddu $t3, $t1, $t2 :: rd 0x16, rs 0x42b0c0a28677b502, rt 0xed5005cbc8b0a214 10 baddu $t3, $t1, $t2 :: rd 0x42, rs 0x42b0c0a28677b502, rt 0x87750a04ad765040 [all …]
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D | cvm_ins.stdout.exp | 514 sne $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x0 515 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x130476dc 516 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x2608edb8 517 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x350c9b64 518 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x4c11db70 519 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x5f15adac 520 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x6a1936c8 521 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x791d4014 522 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x9823b6e0 523 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x8b27c03c [all …]
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D | arithmetic_instruction.stdout.exp-mips64r2 | 1 add $t0, $t1, $t2 :: rd 0xffffffffb1f740b4, rs 0x0, rt 0xffffffffb1f740b4 2 add $t0, $t1, $t2 :: rd 0xffffffffb5365d03, rs 0x0, rt 0xffffffffb5365d03 3 add $t0, $t1, $t2 :: rd 0xffffffffc1f7b748, rs 0x9823b6e, rt 0xffffffffb8757bda 4 add $t0, $t1, $t2 :: rd 0xffffffffc9f78d46, rs 0xd4326d9, rt 0xffffffffbcb4666d 5 add $t0, $t1, $t2 :: rd 0xffffffffb5f7ad44, rs 0x130476dc, rt 0xffffffffa2f33668 6 add $t0, $t1, $t2 :: rd 0xffffffffbdf7974a, rs 0x17c56b6b, rt 0xffffffffa6322bdf 7 add $t0, $t1, $t2 :: rd 0xffffffffc5f75ab8, rs 0x1a864db2, rt 0xffffffffab710d06 8 add $t0, $t1, $t2 :: rd 0xffffffffcdf760b6, rs 0x1e475005, rt 0xffffffffafb010b1 9 add $t0, $t1, $t2 :: rd 0xffffffffbe089ac4, rs 0x2608edb8, rt 0xffffffff97ffad0c 10 add $t0, $t1, $t2 :: rd 0xffffffffb608a0ca, rs 0x22c9f00f, rt 0xffffffff933eb0bb [all …]
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/external/v8/src/arm64/ |
D | macro-assembler-arm64-inl.h | 46 void MacroAssembler::And(const Register& rd, in And() argument 50 DCHECK(!rd.IsZero()); in And() 51 LogicalMacro(rd, rn, operand, AND); in And() 55 void MacroAssembler::Ands(const Register& rd, in Ands() argument 59 DCHECK(!rd.IsZero()); in Ands() 60 LogicalMacro(rd, rn, operand, ANDS); in Ands() 71 void MacroAssembler::Bic(const Register& rd, in Bic() argument 75 DCHECK(!rd.IsZero()); in Bic() 76 LogicalMacro(rd, rn, operand, BIC); in Bic() 80 void MacroAssembler::Bics(const Register& rd, in Bics() argument [all …]
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D | assembler-arm64.cc | 1080 void Assembler::adr(const Register& rd, int imm21) { in adr() argument 1081 DCHECK(rd.Is64Bits()); in adr() 1082 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd)); in adr() 1086 void Assembler::adr(const Register& rd, Label* label) { in adr() argument 1087 adr(rd, LinkAndGetByteOffsetTo(label)); in adr() 1091 void Assembler::add(const Register& rd, in add() argument 1094 AddSub(rd, rn, operand, LeaveFlags, ADD); in add() 1098 void Assembler::adds(const Register& rd, in adds() argument 1101 AddSub(rd, rn, operand, SetFlags, ADD); in adds() 1112 void Assembler::sub(const Register& rd, in sub() argument [all …]
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D | assembler-arm64.h | 1006 void adr(const Register& rd, Label* label); 1007 void adr(const Register& rd, int imm21); 1011 void add(const Register& rd, 1016 void adds(const Register& rd, 1024 void sub(const Register& rd, 1029 void subs(const Register& rd, 1037 void neg(const Register& rd, 1041 void negs(const Register& rd, 1045 void adc(const Register& rd, 1050 void adcs(const Register& rd, [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrAliases.td | 15 // mov<cond> <ccreg> rs2, rd 20 // mov<cond> (%icc|%xcc), rs2, rd 22 ", $rs2, $rd"), 23 (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>; 25 // mov<cond> (%icc|%xcc), simm11, rd 27 ", $simm11, $rd"), 28 (movri IntRegs:$rd, i32imm:$simm11, condVal)>; 30 // fmovs<cond> (%icc|%xcc), $rs2, $rd 32 ", $rs2, $rd"), 33 (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>; [all …]
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D | SparcInstrVIS.td | 21 (outs RC:$rd), (ins RC:$rs1, RC:$rs2), 22 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 27 (outs I64Regs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), 28 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 31 let rd = 0, rs1 = 0, rs2 = 0 in 35 // For VIS Instructions with only rs1, rd operands. 39 (outs RC:$rd), (ins RC:$rs1), 40 !strconcat(OpcStr, " $rs1, $rd"), []>; 42 // For VIS Instructions with only rs2, rd operands. 46 (outs RC:$rd), (ins RC:$rs2), [all …]
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D | SparcInstrInfo.td | 253 (outs RC:$rd), (ins RC:$rs1, RC:$rs2), 254 !strconcat(OpcStr, " $rs1, $rs2, $rd"), 255 [(set Ty:$rd, (OpNode Ty:$rs1, Ty:$rs2))]>; 257 (outs RC:$rd), (ins RC:$rs1, immOp:$simm13), 258 !strconcat(OpcStr, " $rs1, $simm13, $rd"), 259 [(set Ty:$rd, (OpNode Ty:$rs1, (Ty simm13:$simm13)))]>; 266 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2), 267 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 269 (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13), 270 !strconcat(OpcStr, " $rs1, $simm13, $rd"), []>; [all …]
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/external/valgrind/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32-LE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32-BE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-LE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-BE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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/external/valgrind/none/tests/arm/ |
D | v6intARM.stdout.exp | 2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z 8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N 11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C 12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC 13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C 17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N [all …]
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D | v6media.stdout.exp | 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[… 5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[… 6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[… 7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[… 9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x… 10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x… 11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x… 12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x… [all …]
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/external/valgrind/none/tests/arm64/ |
D | integer.stdout.exp | 2 add x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000… 3 add w3, w4, w5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000… 4 adc x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000… 5 adc x3, x4, x5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 2000000… 6 adc x3, x4, x5 :: rd ffffffffffffffff rm 0000000000000000, rn ffffffffffffffff, cin 0, nzcv 0000000… 7 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn ffffffffffffffff, cin 1, nzcv 2000000… 8 adc x3, x4, x5 :: rd 5859704f00000000 rm 3141592700000000, rn 2718172800000000, cin 0, nzcv 0000000… 9 adc x3, x4, x5 :: rd 5859704f00000001 rm 3141592700000000, rn 2718172800000000, cin 1, nzcv 2000000… 10 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 0000000… 11 adc x3, x4, x5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 2000000… [all …]
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.cc | 2164 SimVRegister& rd = vreg(instr->Rd()); in VisitFPDataProcessing1Source() local 2185 case FSQRT_d: fsqrt(vform, rd, rn); return; in VisitFPDataProcessing1Source() 2204 frint(vform, rd, rn, fpcr_rounding, inexact_exception); in VisitFPDataProcessing1Source() 2212 SimVRegister& rd = vreg(instr->Rd()); in VisitFPDataProcessing2Source() local 2218 case FADD_d: fadd(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() 2220 case FSUB_d: fsub(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() 2222 case FMUL_d: fmul(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() 2224 case FNMUL_d: fnmul(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() 2226 case FDIV_d: fdiv(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() 2228 case FMAX_d: fmax(vform, rd, rn, rm); break; in VisitFPDataProcessing2Source() [all …]
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D | macro-assembler-a64.h | 598 const Register &rd, 606 void And(const Register& rd, 609 void Ands(const Register& rd, 612 void Bic(const Register& rd, 615 void Bics(const Register& rd, 618 void Orr(const Register& rd, 621 void Orn(const Register& rd, 624 void Eor(const Register& rd, 627 void Eon(const Register& rd, 631 void LogicalMacro(const Register& rd, [all …]
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/external/icu/icu4c/source/test/cintltst/ |
D | uregiontest.c | 360 const KnownRegion * rd; in TestKnownRegions() local 361 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestKnownRegions() 363 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestKnownRegions() 366 int32_t e = rd->numeric; in TestKnownRegions() 370 if (uregion_getType(r) != rd->type) { in TestKnownRegions() 371 …Expected region %s to be of type %d. Got: %d\n", uregion_getRegionCode(r), rd->type, uregion_getTy… in TestKnownRegions() 381 log_data_err("ERROR: Known region %s was not recognized.\n", rd->code); in TestKnownRegions() 387 const KnownRegion * rd; in TestGetContainedRegions() local 388 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestGetContainedRegions() 390 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestGetContainedRegions() [all …]
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/external/libvpx/libvpx/vp9/encoder/ |
D | vp9_rd.c | 236 static void set_block_thresholds(const VP9_COMMON *cm, RD_OPT *rd) { in set_block_thresholds() argument 253 rd->threshes[segment_id][bsize][i] = in set_block_thresholds() 254 rd->thresh_mult[i] < thresh_max in set_block_thresholds() 255 ? rd->thresh_mult[i] * t / 4 in set_block_thresholds() 259 rd->threshes[segment_id][bsize][i] = in set_block_thresholds() 260 rd->thresh_mult_sub8x8[i] < thresh_max in set_block_thresholds() 261 ? rd->thresh_mult_sub8x8[i] * t / 4 in set_block_thresholds() 272 RD_OPT *const rd = &cpi->rd; in vp9_initialize_rd_consts() local 277 rd->RDDIV = RDDIV_BITS; // In bits (to multiply D by 128). in vp9_initialize_rd_consts() 278 rd->RDMULT = vp9_compute_rd_mult(cpi, cm->base_qindex + cm->y_dc_delta_q); in vp9_initialize_rd_consts() [all …]
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/external/llvm/test/MC/Sparc/ |
D | sparc-special-registers.s | 4 ! CHECK: rd %y, %i0 ! encoding: [0xb1,0x40,0x00,0x00] 5 rd %y, %i0 7 ! CHECK: rd %asr1, %i0 ! encoding: [0xb1,0x40,0x40,0x00] 8 rd %asr1, %i0 16 ! CHECK: rd %asr15, %g0 ! encoding: [0x81,0x43,0xc0,0x00] 17 rd %asr15, %g0 19 ! CHECK: rd %psr, %i0 ! encoding: [0xb1,0x48,0x00,0x00] 20 rd %psr, %i0 22 ! CHECK: rd %wim, %i0 ! encoding: [0xb1,0x50,0x00,0x00] 23 rd %wim, %i0 [all …]
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/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/util/ |
D | RegionTest.java | 339 for (String [] rd : knownRegions ) { in TestKnownRegions() 341 Region r = Region.getInstance(rd[0]); in TestKnownRegions() 343 int e = Integer.valueOf(rd[1]).intValue(); in TestKnownRegions() 347 if (r.getType() != Region.RegionType.valueOf(rd[3])) { in TestKnownRegions() 348 …errln("Expected region " + r.toString() + " to be of type " + rd[3] + ". Got:" + r.getType().toStr… in TestKnownRegions() 350 int nc = Integer.valueOf(rd[1]).intValue(); in TestKnownRegions() 358 errln("Known region " + rd[0] + " was not recognized."); in TestKnownRegions() 436 for (String [] rd : knownRegions ) { in TestGetContainedRegions() 438 Region r = Region.getInstance(rd[0]); in TestGetContainedRegions() 450 errln("Known region " + rd[0] + " was not recognized."); in TestGetContainedRegions() [all …]
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/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/util/ |
D | RegionTest.java | 343 for (String [] rd : knownRegions ) { in TestKnownRegions() 345 Region r = Region.getInstance(rd[0]); in TestKnownRegions() 347 int e = Integer.valueOf(rd[1]).intValue(); in TestKnownRegions() 351 if (r.getType() != Region.RegionType.valueOf(rd[3])) { in TestKnownRegions() 352 …errln("Expected region " + r.toString() + " to be of type " + rd[3] + ". Got:" + r.getType().toStr… in TestKnownRegions() 354 int nc = Integer.valueOf(rd[1]).intValue(); in TestKnownRegions() 362 errln("Known region " + rd[0] + " was not recognized."); in TestKnownRegions() 440 for (String [] rd : knownRegions ) { in TestGetContainedRegions() 442 Region r = Region.getInstance(rd[0]); in TestGetContainedRegions() 454 errln("Known region " + rd[0] + " was not recognized."); in TestGetContainedRegions() [all …]
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/external/valgrind/VEX/priv/ |
D | guest_tilegx_toIR.c | 294 ULong cins, opcode = -1, rd, ra, rb, imm = 0; in disInstr_TILEGX_WRK() local 425 rd = ra = rb = -1; in disInstr_TILEGX_WRK() 438 if (rd == -1) in disInstr_TILEGX_WRK() 439 rd = decoded[n].operand_values[opi]; in disInstr_TILEGX_WRK() 488 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() 493 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() 498 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() 537 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() 543 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() 549 MARK_REG_WB(rd, t2); in disInstr_TILEGX_WRK() [all …]
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