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Searched refs:RawFrm (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrControl.td24 def RETL : I <0xC3, RawFrm, (outs), (ins variable_ops),
27 def RETQ : I <0xC3, RawFrm, (outs), (ins variable_ops),
30 def RETW : I <0xC3, RawFrm, (outs), (ins),
33 def RETIL : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
37 def RETIQ : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
41 def RETIW : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt),
44 def LRETL : I <0xCB, RawFrm, (outs), (ins),
46 def LRETQ : RI <0xCB, RawFrm, (outs), (ins),
48 def LRETW : I <0xCB, RawFrm, (outs), (ins),
50 def LRETIL : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
[all …]
DX86InstrSystem.td18 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)], IIC_RDTSC>,
27 def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
28 def UD2B : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
31 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", [], IIC_HLT>;
32 def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
36 def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
37 def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
47 def INT : Ii8<0xcd, RawFrm, (outs), (ins u8imm:$trap), "int\t$trap",
51 def SYSCALL : I<0x05, RawFrm, (outs), (ins), "syscall", [], IIC_SYSCALL>, TB;
52 def SYSRET : I<0x07, RawFrm, (outs), (ins), "sysret{l}", [], IIC_SYSCALL>, TB;
[all …]
DX86InstrTSX.td47 def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>, Requires<[HasHLE]>;
48 def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>, Requires<[HasHLE]>;
DX86InstrExtension.td16 def CBW : I<0x98, RawFrm, (outs), (ins),
19 def CWDE : I<0x98, RawFrm, (outs), (ins),
23 def CWD : I<0x99, RawFrm, (outs), (ins),
26 def CDQ : I<0x99, RawFrm, (outs), (ins),
31 def CDQE : RI<0x98, RawFrm, (outs), (ins),
35 def CQO : RI<0x99, RawFrm, (outs), (ins),
DX86InstrInfo.td1020 def NOOP : I<0x90, RawFrm, (outs), (ins), "nop", [], IIC_NOP>;
1034 def LEAVE : I<0xC9, RawFrm,
1039 def LEAVE64 : I<0xC9, RawFrm,
1074 def PUSH16i8 : Ii8<0x6a, RawFrm, (outs), (ins i16i8imm:$imm),
1076 def PUSHi16 : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm),
1079 def PUSH32i8 : Ii8<0x6a, RawFrm, (outs), (ins i32i8imm:$imm),
1082 def PUSHi32 : Ii32<0x68, RawFrm, (outs), (ins i32imm:$imm),
1098 def POPF16 : I<0x9D, RawFrm, (outs), (ins), "popf{w}", [], IIC_POP_F>,
1100 def POPF32 : I<0x9D, RawFrm, (outs), (ins), "popf{l|d}", [], IIC_POP_FD>,
1106 def PUSHF16 : I<0x9C, RawFrm, (outs), (ins), "pushf{w}", [], IIC_PUSH_F>,
[all …]
DX86InstrCompiler.td141 def EH_RETURN : I<0xC3, RawFrm, (outs), (ins GR32:$addr),
149 def EH_RETURN64 : I<0xC3, RawFrm, (outs), (ins GR64:$addr),
375 def REP_MOVSB_32 : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}",
378 def REP_MOVSW_32 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsw|rep movsw}",
381 def REP_MOVSD_32 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
387 def REP_MOVSB_64 : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}",
390 def REP_MOVSW_64 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsw|rep movsw}",
393 def REP_MOVSD_64 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
396 def REP_MOVSQ_64 : RI<0xA5, RawFrm, (outs), (ins), "{rep;movsq|rep movsq}",
404 def REP_STOSB_32 : I<0xAA, RawFrm, (outs), (ins), "{rep;stosb|rep stosb}",
[all …]
DX86Instr3DNow.td87 def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms",
DX86InstrMMX.td213 def MMX_EMMS : MMXI<0x77, RawFrm, (outs), (ins), "emms",
DX86InstrFPStack.td642 def WAIT : I<0x9B, RawFrm, (outs), (ins), "wait", [], IIC_WAIT>;
DX86InstrFormats.td21 def Pseudo : Format<0>; def RawFrm : Format<1>;
DX86InstrArithmetic.td922 : ITy<opcode, RawFrm, typeinfo,
DX86InstrSSE.td3732 def PAUSE : I<0x90, RawFrm, (outs), (ins),
8183 def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall",
8187 def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper",
/external/llvm/test/TableGen/
DTargetInstrInfo.td48 def Pseudo : Format<0>; def RawFrm : Format<1>;
138 "cbw", 0x98, RawFrm,
142 def NOOP : Inst<(ops), "nop", 0x90, RawFrm, []>;
146 def IN8rr : Inst<(ops), "in AL, EDX", 0xEC, RawFrm,
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h232 RawFrm = 1, enumerator
668 case X86II::RawFrm: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp716 case X86II::RawFrm: in EmitVEXOpcodePrefix()
1285 case X86II::RawFrm: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp95 RawFrm = 1, enumerator
585 case X86Local::RawFrm: in emitInstructionSpecifier()
/external/llvm/docs/TableGen/
DLangIntro.rst538 def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>;
545 def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
/external/llvm/docs/
DWritingAnLLVMBackend.rst1802 case X86II::RawFrm: // for instructions with a fixed opcode value