1 // RUN: %clang_cc1 -triple arm64-apple-ios -O3 -emit-llvm -o - %s | FileCheck %s
2
f0(void * a,void * b)3 void f0(void *a, void *b) {
4 __clear_cache(a,b);
5 // CHECK: call {{.*}} @__clear_cache
6 }
7
tp(void)8 void *tp (void) {
9 return __builtin_thread_pointer ();
10 // CHECK: call {{.*}} @llvm.aarch64.thread.pointer()
11 }
12
13 // CHECK: call {{.*}} @llvm.aarch64.rbit.i32(i32 %a)
rbit(unsigned a)14 unsigned rbit(unsigned a) {
15 return __builtin_arm_rbit(a);
16 }
17
18 // CHECK: call {{.*}} @llvm.aarch64.rbit.i64(i64 %a)
rbit64(unsigned long long a)19 unsigned long long rbit64(unsigned long long a) {
20 return __builtin_arm_rbit64(a);
21 }
22
hints()23 void hints() {
24 __builtin_arm_nop(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0)
25 __builtin_arm_yield(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1)
26 __builtin_arm_wfe(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2)
27 __builtin_arm_wfi(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3)
28 __builtin_arm_sev(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 4)
29 __builtin_arm_sevl(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 5)
30 }
31
barriers()32 void barriers() {
33 __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.aarch64.dmb(i32 1)
34 __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.aarch64.dsb(i32 2)
35 __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.aarch64.isb(i32 3)
36 }
37
prefetch()38 void prefetch() {
39 __builtin_arm_prefetch(0, 1, 2, 0, 1); // pstl3keep
40 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
41
42 __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1keep
43 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
44
45 __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1strm
46 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
47
48 __builtin_arm_prefetch(0, 0, 0, 0, 0); // plil1keep
49 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
50 }
51
rsr()52 unsigned rsr() {
53 // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
54 // CHECK-NEXT: trunc i64 [[V0]] to i32
55 return __builtin_arm_rsr("1:2:3:4:5");
56 }
57
rsr64()58 unsigned long rsr64() {
59 // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
60 return __builtin_arm_rsr64("1:2:3:4:5");
61 }
62
rsrp()63 void *rsrp() {
64 // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
65 // CHECK-NEXT: inttoptr i64 [[V0]] to i8*
66 return __builtin_arm_rsrp("1:2:3:4:5");
67 }
68
wsr(unsigned v)69 void wsr(unsigned v) {
70 // CHECK: [[V0:[%A-Za-z0-9.]+]] = zext i32 %v to i64
71 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]])
72 __builtin_arm_wsr("1:2:3:4:5", v);
73 }
74
wsr64(unsigned long v)75 void wsr64(unsigned long v) {
76 // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v)
77 __builtin_arm_wsr64("1:2:3:4:5", v);
78 }
79
wsrp(void * v)80 void wsrp(void *v) {
81 // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i64
82 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]])
83 __builtin_arm_wsrp("1:2:3:4:5", v);
84 }
85
86 // CHECK: ![[M0]] = !{!"1:2:3:4:5"}
87