1; RUN: llc %s -o - -aarch64-atomic-cfg-tidy=0 | FileCheck %s 2; Check that ANDS (tst) is not merged with ADD when the immediate 3; is not 0. 4; <rdar://problem/16693089> 5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6target triple = "arm64-apple-ios" 7 8; CHECK-LABEL: tst1: 9; CHECK: add [[REG:w[0-9]+]], w{{[0-9]+}}, #1 10; CHECK: tst [[REG]], #0x1 11define void @tst1(i1 %tst, i32 %true) { 12entry: 13 br i1 %tst, label %for.end, label %for.body 14 15for.body: ; preds = %for.body, %entry 16 %result.09 = phi i32 [ %add2.result.0, %for.body ], [ 1, %entry ] 17 %i.08 = phi i32 [ %inc, %for.body ], [ 2, %entry ] 18 %and = and i32 %i.08, 1 19 %cmp1 = icmp eq i32 %and, 0 20 %add2.result.0 = select i1 %cmp1, i32 %true, i32 %result.09 21 %inc = add nsw i32 %i.08, 1 22 %cmp = icmp slt i32 %i.08, %true 23 br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge 24 25for.cond.for.end_crit_edge: ; preds = %for.body 26 %add2.result.0.lcssa = phi i32 [ %add2.result.0, %for.body ] 27 br label %for.end 28 29for.end: ; preds = %for.cond.for.end_crit_edge, %entry 30 ret void 31} 32