1; RUN: llc -march=amdgcn -verify-machineinstrs -asm-verbose < %s | FileCheck -check-prefix=SI %s 2; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -verify-machineinstrs -asm-verbose < %s | FileCheck -check-prefix=SI %s 3 4declare i32 @llvm.SI.tid() nounwind readnone 5 6; SI-LABEL: {{^}}foo: 7; SI: .section .AMDGPU.csdata 8; SI: ; Kernel info: 9; SI: ; NumSgprs: {{[0-9]+}} 10; SI: ; NumVgprs: {{[0-9]+}} 11define void @foo(i32 addrspace(1)* noalias %out, i32 addrspace(1)* %abase, i32 addrspace(1)* %bbase) nounwind { 12 %tid = call i32 @llvm.SI.tid() nounwind readnone 13 %aptr = getelementptr i32, i32 addrspace(1)* %abase, i32 %tid 14 %bptr = getelementptr i32, i32 addrspace(1)* %bbase, i32 %tid 15 %outptr = getelementptr i32, i32 addrspace(1)* %out, i32 %tid 16 %a = load i32, i32 addrspace(1)* %aptr, align 4 17 %b = load i32, i32 addrspace(1)* %bptr, align 4 18 %result = add i32 %a, %b 19 store i32 %result, i32 addrspace(1)* %outptr, align 4 20 ret void 21} 22 23; SI-LABEL: {{^}}one_vgpr_used: 24; SI: NumVgprs: 1 25define void @one_vgpr_used(i32 addrspace(1)* %out, i32 %x) nounwind { 26 store i32 %x, i32 addrspace(1)* %out, align 4 27 ret void 28} 29