1; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \ 2; RUN: | llvm-objdump -no-show-raw-insn -arch mipsel -mcpu=mips32r2 -mattr=micromips -d - \ 3; RUN: | FileCheck %s -check-prefix=MICROMIPS 4 5; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct. 6; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2 7; instruction instead of microMIPS instruction, and since many mips32r2 and microMIPS 8; instructions have identical assembly formats, invalid instruction cannot be detected. 9 10@y = common global i8 0, align 1 11 12define signext i8 @AtomicLoadAdd8(i8 signext %incr) nounwind { 13entry: 14 %0 = atomicrmw add i8* @y, i8 %incr monotonic 15 ret i8 %0 16 17; MICROMIPS: ll ${{[0-9]+}}, 0(${{[0-9]+}}) 18; MICROMIPS: sc ${{[0-9]+}}, 0(${{[0-9]+}}) 19} 20 21define signext i8 @AtomicCmpSwap8(i8 signext %oldval, i8 signext %newval) nounwind { 22entry: 23 %pair0 = cmpxchg i8* @y, i8 %oldval, i8 %newval monotonic monotonic 24 %0 = extractvalue { i8, i1 } %pair0, 0 25 ret i8 %0 26 27; MICROMIPS: ll ${{[0-9]+}}, 0(${{[0-9]+}}) 28; MICROMIPS: sc ${{[0-9]+}}, 0(${{[0-9]+}}) 29} 30