1; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ 2; RUN: -relocation-model=pic -O3 < %s | FileCheck %s 3 4@a = global i32 10, align 4 5@b = global i32 0, align 4 6@c = global i32 10, align 4 7@d = global i32 0, align 4 8 9define i32 @shift_left() nounwind { 10entry: 11 %0 = load i32, i32* @a, align 4 12 %shl = shl i32 %0, 4 13 store i32 %shl, i32* @b, align 4 14 15 %1 = load i32, i32* @c, align 4 16 %shl1 = shl i32 %1, 10 17 store i32 %shl1, i32* @d, align 4 18 19 ret i32 0 20} 21 22; CHECK: sll16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}} 23; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} 24 25@i = global i32 10654, align 4 26@j = global i32 0, align 4 27@m = global i32 10, align 4 28@n = global i32 0, align 4 29 30define i32 @shift_right() nounwind { 31entry: 32 %0 = load i32, i32* @i, align 4 33 %shr = lshr i32 %0, 4 34 store i32 %shr, i32* @j, align 4 35 36 %1 = load i32, i32* @m, align 4 37 %shr1 = lshr i32 %1, 10 38 store i32 %shr1, i32* @n, align 4 39 40 ret i32 0 41} 42 43; CHECK: srl16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}} 44; CHECK: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} 45