1; Test moves between FPRs and GPRs for z196 and zEC12. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 4 5; Check that moves from i32s to floats can use high registers. 6define float @f1(i16 *%ptr) { 7; CHECK-LABEL: f1: 8; CHECK: llhh [[REG:%r[0-5]]], 0(%r2) 9; CHECK: oihh [[REG]], 16256 10; CHECK: ldgr %f0, [[REG]] 11; CHECK: br %r14 12 %base = load i16 , i16 *%ptr 13 %ext = zext i16 %base to i32 14 %full = or i32 %ext, 1065353216 15 %res = bitcast i32 %full to float 16 ret float %res 17} 18 19; Check that moves from floats to i32s can use high registers. 20; This "store the low byte" technique is used by llvmpipe, for example. 21define void @f2(float %val, i8 *%ptr) { 22; CHECK-LABEL: f2: 23; CHECK: lgdr [[REG:%r[0-5]]], %f0 24; CHECK: stch [[REG]], 0(%r2) 25; CHECK: br %r14 26 %res = bitcast float %val to i32 27 %trunc = trunc i32 %res to i8 28 store i8 %trunc, i8 *%ptr 29 ret void 30} 31 32; Like f2, but with a conditional store. 33define void @f3(float %val, i8 *%ptr, i32 %which) { 34; CHECK-LABEL: f3: 35; CHECK: cijlh %r3, 0, 36; CHECK: lgdr [[REG:%r[0-5]]], %f0 37; CHECK: stch [[REG]], 0(%r2) 38; CHECK: br %r14 39 %int = bitcast float %val to i32 40 %trunc = trunc i32 %int to i8 41 %old = load i8 , i8 *%ptr 42 %cmp = icmp eq i32 %which, 0 43 %res = select i1 %cmp, i8 %trunc, i8 %old 44 store i8 %res, i8 *%ptr 45 ret void 46} 47 48; ...and again with 16-bit memory. 49define void @f4(float %val, i16 *%ptr, i32 %which) { 50; CHECK-LABEL: f4: 51; CHECK: cijlh %r3, 0, 52; CHECK: lgdr [[REG:%r[0-5]]], %f0 53; CHECK: sthh [[REG]], 0(%r2) 54; CHECK: br %r14 55 %int = bitcast float %val to i32 56 %trunc = trunc i32 %int to i16 57 %old = load i16 , i16 *%ptr 58 %cmp = icmp eq i32 %which, 0 59 %res = select i1 %cmp, i16 %trunc, i16 %old 60 store i16 %res, i16 *%ptr 61 ret void 62} 63