1; RUN: opt -S -structurizecfg %s -o - | FileCheck %s 2 3define void @main(float addrspace(1)* %out) { 4 5; CHECK: main_body: 6; CHECK: br label %LOOP.outer 7main_body: 8 br label %LOOP.outer 9 10; CHECK: LOOP.outer: 11; CHECK: br label %LOOP 12LOOP.outer: ; preds = %ENDIF28, %main_body 13 %temp8.0.ph = phi float [ 0.000000e+00, %main_body ], [ %tmp35, %ENDIF28 ] 14 %temp4.0.ph = phi i32 [ 0, %main_body ], [ %tmp20, %ENDIF28 ] 15 br label %LOOP 16 17; CHECK: LOOP: 18; br i1 %{{[0-9]+}}, label %ENDIF, label %Flow 19LOOP: ; preds = %IF29, %LOOP.outer 20 %temp4.0 = phi i32 [ %temp4.0.ph, %LOOP.outer ], [ %tmp20, %IF29 ] 21 %tmp20 = add i32 %temp4.0, 1 22 %tmp22 = icmp sgt i32 %tmp20, 3 23 br i1 %tmp22, label %ENDLOOP, label %ENDIF 24 25; CHECK: Flow3 26; CHECK: br i1 %{{[0-9]+}}, label %ENDLOOP, label %LOOP.outer 27 28; CHECK: ENDLOOP: 29; CHECK: ret void 30ENDLOOP: ; preds = %ENDIF28, %IF29, %LOOP 31 %temp8.1 = phi float [ %temp8.0.ph, %LOOP ], [ %temp8.0.ph, %IF29 ], [ %tmp35, %ENDIF28 ] 32 %tmp23 = icmp eq i32 %tmp20, 3 33 %.45 = select i1 %tmp23, float 0.000000e+00, float 1.000000e+00 34 store float %.45, float addrspace(1)* %out 35 ret void 36 37; CHECK: ENDIF: 38; CHECK: br i1 %tmp31, label %IF29, label %Flow1 39ENDIF: ; preds = %LOOP 40 %tmp31 = icmp sgt i32 %tmp20, 1 41 br i1 %tmp31, label %IF29, label %ENDIF28 42 43; CHECK: Flow: 44; CHECK: br i1 %{{[0-9]+}}, label %Flow2, label %LOOP 45 46; CHECK: IF29: 47; CHECK: br label %Flow1 48IF29: ; preds = %ENDIF 49 %tmp32 = icmp sgt i32 %tmp20, 2 50 br i1 %tmp32, label %ENDLOOP, label %LOOP 51 52; CHECK: Flow1: 53; CHECK: br label %Flow 54 55; CHECK: Flow2: 56; CHECK: br i1 %{{[0-9]+}}, label %ENDIF28, label %Flow3 57 58; CHECK: ENDIF28: 59; CHECK: br label %Flow3 60ENDIF28: ; preds = %ENDIF 61 %tmp35 = fadd float %temp8.0.ph, 1.0 62 %tmp36 = icmp sgt i32 %tmp20, 2 63 br i1 %tmp36, label %ENDLOOP, label %LOOP.outer 64} 65 66; Function Attrs: nounwind readnone 67declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1 68 69; Function Attrs: readnone 70declare float @llvm.AMDIL.clamp.(float, float, float) #2 71 72declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 73 74attributes #0 = { "ShaderType"="1" "enable-no-nans-fp-math"="true" "unsafe-fp-math"="true" } 75attributes #1 = { nounwind readnone } 76attributes #2 = { readnone } 77 78!0 = !{!1, !1, i64 0, i32 1} 79!1 = !{!"const", null} 80