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Searched refs:Bic (Results 1 – 15 of 15) sorted by relevance

/external/v8/src/ic/arm64/
Dstub-cache-arm64.cc69 __ Bic(scratch2.W(), scratch2.W(), Code::kFlagsNotUsedInLookup); in ProbeTable() local
/external/v8/test/cctest/
Dtest-disasm-arm64.cc1698 COMPARE(Bic(w6, w7, 0), "mov w6, w7"); in TEST_()
1699 COMPARE(Bic(x6, x7, 0), "mov x6, x7"); in TEST_()
1714 COMPARE(Bic(w18, w19, 0xffffffff), "movz w18, #0x0"); in TEST_()
1715 COMPARE(Bic(x18, x19, 0xffffffff), "and x18, x19, #0xffffffff00000000"); in TEST_()
1716 COMPARE(Bic(x18, x19, 0xffffffffffffffff), "movz x18, #0x0"); in TEST_()
Dtest-assembler-arm64.cc826 __ Bic(x2, x0, Operand(x1)); in TEST() local
827 __ Bic(w3, w0, Operand(w1, LSL, 4)); in TEST() local
828 __ Bic(x4, x0, Operand(x1, LSL, 4)); in TEST() local
829 __ Bic(x5, x0, Operand(x1, LSR, 1)); in TEST() local
830 __ Bic(w6, w0, Operand(w1, ASR, 20)); in TEST() local
831 __ Bic(x7, x0, Operand(x1, ASR, 20)); in TEST() local
832 __ Bic(w8, w0, Operand(w1, ROR, 28)); in TEST() local
833 __ Bic(x9, x0, Operand(x1, ROR, 24)); in TEST() local
834 __ Bic(x10, x0, Operand(0x1f)); in TEST() local
835 __ Bic(x11, x0, Operand(0x100)); in TEST() local
[all …]
/external/v8/src/arm64/
Dmacro-assembler-arm64.cc1876 Bic(csp, old_stack_pointer, sp_alignment - 1); in CallCFunction()
2212 Bic(bulk_length, length, pair_mask); in CopyBytes()
3272 Bic(scratch1, scratch1, kObjectAlignmentMask); in AllocateTwoByteString()
3297 Bic(scratch1, scratch1, kObjectAlignmentMask); in AllocateOneByteString()
3938 Bic(key, key, Operand(0xc0000000u)); in GetNumberHash()
4431 Bic(bitmap_reg, addr_reg, Page::kPageAlignmentMask); in GetMarkBits()
4854 Bic(csp, StackPointer(), 0xf); in PrintfNoPreserve()
Dmacro-assembler-arm64-inl.h71 void MacroAssembler::Bic(const Register& rd, in Bic() function
1441 Bic(untagged_obj, obj, kHeapObjectTag); in ObjectUntag()
Dmacro-assembler-arm64.h180 inline void Bic(const Register& rd,
868 Bic(csp, StackPointer(), sp_alignment - 1); in AlignAndSetCSPForFrame()
Dcode-stubs-arm64.cc1863 __ Bic(x11, current_offset, kSmiShiftMask); in Generate()
3329 __ Bic(mem_chunk, regs_.object(), Page::kPageAlignmentMask); in CheckNeedsToInformIncrementalMarker() local
/external/vixl/test/
Dtest-assembler-a64.cc810 __ Bic(x2, x0, Operand(x1)); in TEST() local
811 __ Bic(w3, w0, Operand(w1, LSL, 4)); in TEST() local
812 __ Bic(x4, x0, Operand(x1, LSL, 4)); in TEST() local
813 __ Bic(x5, x0, Operand(x1, LSR, 1)); in TEST() local
814 __ Bic(w6, w0, Operand(w1, ASR, 20)); in TEST() local
815 __ Bic(x7, x0, Operand(x1, ASR, 20)); in TEST() local
816 __ Bic(w8, w0, Operand(w1, ROR, 28)); in TEST() local
817 __ Bic(x9, x0, Operand(x1, ROR, 24)); in TEST() local
818 __ Bic(x10, x0, Operand(0x1f)); in TEST() local
819 __ Bic(x11, x0, Operand(0x100)); in TEST() local
[all …]
Dtest-disasm-a64.cc2720 COMPARE(Bic(w6, w7, 0), "mov w6, w7"); in TEST()
2721 COMPARE(Bic(x6, x7, 0), "mov x6, x7"); in TEST()
2736 COMPARE(Bic(w18, w19, 0xffffffff), "mov w18, #0x0"); in TEST()
2737 COMPARE(Bic(x18, x19, 0xffffffff), "and x18, x19, #0xffffffff00000000"); in TEST()
2738 COMPARE(Bic(x18, x19, 0xffffffffffffffff), "mov x18, #0x0"); in TEST()
3806 COMPARE(Bic(v6.V8B(), v7.V8B(), v8.V8B()), "bic v6.8b, v7.8b, v8.8b"); in TEST()
3807 COMPARE(Bic(v6.V16B(), v7.V16B(), v8.V16B()), "bic v6.16b, v7.16b, v8.16b"); in TEST()
4655 COMPARE(Bic(v4.V4H(), 0xaa, 0), "bic v4.4h, #0xaa, lsl #0"); in TEST()
4656 COMPARE(Bic(v1.V8H(), 0xcc, 8), "bic v1.8h, #0xcc, lsl #8"); in TEST()
4657 COMPARE(Bic(v4.V2S(), 0xaa, 0), "bic v4.2s, #0xaa, lsl #0"); in TEST()
[all …]
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.cc656 void MacroAssembler::Bic(const Register& rd, in Bic() function in vixl::MacroAssembler
2184 Bic(sp, StackPointer(), 0xf); in PrintfNoPreserve()
Dmacro-assembler-a64.h612 void Bic(const Register& rd,
2116 V(bic, Bic) \
2446 void Bic(const VRegister& vd,
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc903 __ Bic(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
907 __ Bic(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
/external/v8/src/crankshaft/arm64/
Dlithium-codegen-arm64.cc3452 __ Bic(result_bits, result_bits, kXSignMask); in DoDeferredMathAbsTagged() local
4640 __ Bic(result, result, kSmiShiftMask); in DoShiftS() local
4647 __ Bic(result, result, kSmiShiftMask); in DoShiftS() local
4673 __ Bic(result, result, kSmiShiftMask); in DoShiftS() local
4680 __ Bic(result, result, kSmiShiftMask); in DoShiftS() local
/external/v8/src/full-codegen/arm64/
Dfull-codegen-arm64.cc1840 __ Bic(result, result, kSmiShiftMask); in EmitInlineSmiBinaryOp() local
1852 __ Bic(result, x10, kSmiShiftMask); in EmitInlineSmiBinaryOp() local
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt44 # Vector And, Orr, Eor, Orn, Bic