/external/llvm/test/CodeGen/PowerPC/ |
D | blockaddress.ll | 14 ; MEDIUM: addis [[R0:[0-9]+]], 2, .LC[[LC0:[0-9]+]]@toc@ha 15 ; MEDIUM: ld 3, .LC[[LC0]]@toc@l([[R0]]) 17 ; MEDIUM: .LC[[LC0]]: 20 ; SMALL: ld 3, .LC[[LC0:[0-9]+]]@toc(2) 22 ; SMALL: .LC[[LC0]]:
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D | 2012-09-16-TOC-entry-check.ll | 5 ; This test check if the TOC entry symbol name won't clash with global .LC0 8 @.LC0 = internal global [5 x i8] c".LC0\00" 22 ; avoid name clash with global constants .LC0 and .LC2
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D | extra-toc-reg-deps.ll | 70 ; CHECK: addis [[REG1:[0-9]+]], 2, .LC0@toc@ha 72 ; CHECK: ld {{[0-9]+}}, .LC0@toc@l([[REG1]]) 78 ; CHECK: addis [[REG1:[0-9]+]], 2, .LC0@toc@ha 80 ; CHECK: ld {{[0-9]+}}, .LC0@toc@l([[REG1]])
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D | p8-scalar_vector_conversions.ll | 92 ; CHECK: ld [[REG1:[0-9]+]], .LC0@toc@l 94 ; CHECK-LE: ld [[REG1:[0-9]+]], .LC0@toc@l
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/external/llvm/test/MC/Sparc/ |
D | sparc-pic.s | 15 ! PIC-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT22 .LC0 0x0 16 ! PIC-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT10 .LC0 0x0 37 .LC0: label 63 sethi %hi(.LC0), %i2 64 add %i2, %lo(.LC0), %i2
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/external/ltrace/testsuite/ltrace.torture/ |
D | ia64-sigill.s | 5 .LC0: label 21 addl r36 = @ltoffx(.LC0), r1 23 ld8.mov r36 = [r36], .LC0
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/external/llvm/test/Assembler/ |
D | 2002-08-15-UnresolvedGlobalReference.ll | 4 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1] 7 ret i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0)
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D | 2002-08-15-ConstantExprProblem.ll | 4 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1] 11 …%ret = phi i8* [ getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0), %0 ], [ null, %BB2 ] …
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D | 2002-08-16-ConstExprInlined.ll | 14 @.LC0 = internal global [4 x i8] c"foo\00" ; <[4 x i8]*> [#uses=1] 21 …%reg211 = call i32 @puts( i8* getelementptr ([4 x i8], [4 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> […
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/external/llvm/test/ExecutionEngine/MCJIT/ |
D | hello.ll | 3 @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] 8 …%reg210 = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32>…
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D | 2002-12-16-ArgTest.ll | 3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1] 16 …call i32 (i8*, ...) @printf( i8* getelementptr ([10 x i8], [10 x i8]* @.LC0, i64 0, i64 0), i32 %a…
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/external/llvm/test/ExecutionEngine/OrcMCJIT/ |
D | hello.ll | 3 @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] 8 …%reg210 = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32>…
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D | 2002-12-16-ArgTest.ll | 3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1] 16 …call i32 (i8*, ...) @printf( i8* getelementptr ([10 x i8], [10 x i8]* @.LC0, i64 0, i64 0), i32 %a…
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/external/valgrind/VEX/test/ |
D | fpgames.s | 5 .LC0: label 24 pushl $.LC0 47 pushl $.LC0
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D | fp1.s | 9 .LC0: label 21 fldl .LC0
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/external/valgrind/memcheck/tests/x86/ |
D | tronical.S | 70 .LC0: label 83 pushl $.LC0
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/external/llvm/test/Transforms/Reassociate/ |
D | looptest.ll | 17 @.LC0 = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] 36 %cast227 = getelementptr [4 x i8], [4 x i8]* @.LC0, i64 0, i64 0 ; <i8*> [#uses=1]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.td | 135 def LC0 : Rc<1, "lc0", ["c1"]>, DwarfRegNum<[68]>; 159 def C1_0 : Rcc<0, "c1:0", [SA0, LC0], ["lc0:sa0"]>, DwarfRegNum<[67]>; 250 (add LC0, SA0, LC1, SA1, 264 LC0, LC1, SA0, SA1, USR, USR_OVF];
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D | HexagonRegisterInfo.cpp | 107 Reserved.set(Hexagon::LC0); in getReservedRegs()
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/external/llvm/lib/Target/X86/ |
D | README-MMX.txt | 71 movq LC0(%rip), %rax
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D | README-X86-64.txt | 14 ucomiss LC0(%rip), %xmm0 17 subss LC0(%rip), %xmm0
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D | README-SSE.txt | 632 movdqa LC0, %xmm0 638 LC0: 649 movdqa .LC0(%rip), %xmm0
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCChecker.h | 189 return (Hexagon::SA0 == R || Hexagon::LC0 == R || in isLoopRegister()
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D | HexagonMCChecker.cpp | 41 Defs[Hexagon::LC0].insert(Unconditional); in init()
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/external/llvm/lib/Target/Hexagon/Disassembler/ |
D | HexagonDisassembler.cpp | 565 Hexagon::SA0, Hexagon::LC0, Hexagon::SA1, Hexagon::LC1, in DecodeCtrRegsRegisterClass()
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