| /external/llvm/include/llvm/CodeGen/ |
| D | LivePhysRegs.h | 56 LiveRegs.setUniverse(TRI->getNumRegs()); in LivePhysRegs()
64 LiveRegs.setUniverse(TRI->getNumRegs()); in init()
76 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in addReg()
86 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in removeReg()
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| /external/llvm/lib/CodeGen/ |
| D | CriticalAntiDepBreaker.cpp | 35 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), in CriticalAntiDepBreaker()
36 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} in CriticalAntiDepBreaker()
43 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in StartBlock()
103 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
251 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) in ScanInstruction()
451 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
505 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); in BreakAntiDependencies()
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| D | RegisterClassInfo.cpp | 56 CSRNum.resize(TRI->getNumRegs(), 0); in runOnMachineFunction()
84 unsigned NumRegs = RC->getNumRegs(); in compute()
178 unsigned NReserved = RC->getNumRegs() - getNumAllocatableRegs(RC); in computePSetLimit()
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| D | MachineRegisterInfo.cpp | 30 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo()
56 if (NewRC->getNumRegs() < MinNumRegs) in constrainRegClass()
164 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) in verifyUseLists()
413 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
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| D | TargetFrameLoweringImpl.cpp | 70 SavedRegs.resize(TRI.getNumRegs()); in determineCalleeSaves()
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| D | ExecutionDepsFix.cpp | 162 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {} in ExeDepsFix()
726 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
747 AliasMap.resize(TRI->getNumRegs()); in runOnMachineFunction()
748 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i) in runOnMachineFunction()
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| D | InterferenceCache.cpp | 36 if (PhysRegEntriesCount == TRI->getNumRegs()) return; in reinitPhysRegEntries()
38 PhysRegEntriesCount = TRI->getNumRegs(); in reinitPhysRegEntries()
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| D | StackMapLivenessAnalysis.cpp | 158 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs()); in createRegisterMask()
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| D | TargetRegisterInfo.cpp | 54 else if (TRI && Reg < TRI->getNumRegs()) in PrintReg()
164 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
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| D | AggressiveAntiDepBreaker.cpp | 143 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); in StartBlock()
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
508 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters()
781 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIRegisterInfo.cpp | 29 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| D | R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 56 unsigned getNumRegs() const { return RegsSize; } in getNumRegs() function
61 assert(i < getNumRegs() && "Register number out of range!"); in getRegister()
368 unsigned getNumRegs() const { in getNumRegs() function
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 41 AMDGPU::SReg_128RegClass.getNumRegs()); in getAllSGPR128()
46 AMDGPU::SGPR_32RegClass.getNumRegs()); in getAllSGPRs()
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| D | R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 86 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs() function
210 return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs()); in getRawAllocationOrder()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXRegisterInfo.cpp | 87 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 296 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} in RegDefsUses()
327 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
363 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegisterInfo.cpp | 47 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 39 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); in getSubRegIndex()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFRegisterInfo.cpp | 38 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 904 ModifiedRegs.resize(TRI->getNumRegs()); in findMatchingInsn()
905 UsedRegs.resize(TRI->getNumRegs()); in findMatchingInsn()
1184 ModifiedRegs.resize(TRI->getNumRegs()); in findMatchingUpdateInsnForward()
1185 UsedRegs.resize(TRI->getNumRegs()); in findMatchingUpdateInsnForward()
1238 ModifiedRegs.resize(TRI->getNumRegs()); in findMatchingUpdateInsnBackward()
1239 UsedRegs.resize(TRI->getNumRegs()); in findMatchingUpdateInsnBackward()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 38 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 99 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 75 BitVector Reserved(getNumRegs()); in getReservedRegs()
|