/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ResourcePriorityQueue.cpp | 97 if (TLI->isTypeLegal(VT) in numberRCValPredInSU() 135 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU() 335 if (TLI->isTypeLegal(VT) in rawRegPressureDelta() 347 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta() 488 if (TLI->isTypeLegal(VT)) { in scheduledNode() 499 if (TLI->isTypeLegal(VT)) { in scheduledNode()
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D | LegalizeTypes.cpp | 130 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(&Node)) { in PerformExpensiveChecks() 425 if (!isTypeLegal(Node.getValueType(i)) && in run() 426 !TLI.isTypeLegal(Node.getValueType(i))) { in run() 435 !isTypeLegal(Node.getOperand(i).getValueType()) && in run() 436 !TLI.isTypeLegal(Node.getOperand(i).getValueType())) { in run() 1139 TLI.isTypeLegal(ValVT) && in WidenTargetBoolean()
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D | FastISel.cpp | 178 if (!TLI.isTypeLegal(VT)) { in getRegForValue() 392 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp() 1253 if (!TLI.isTypeLegal(DstVT)) in selectCast() 1257 if (!TLI.isTypeLegal(SrcVT)) in selectCast() 1290 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast() 1474 if (!TLI.isTypeLegal(IntVT)) in selectFNeg() 1508 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue() 2035 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
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D | LegalizeTypesGeneric.cpp | 114 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 124 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 361 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST()
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D | LegalizeVectorTypes.cpp | 1244 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp() 1245 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp() 2146 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_BinaryCanTrap() 2192 } while (!TLI.isTypeLegal(VT) && NumElts != 1); in WidenVecRes_BinaryCanTrap() 2231 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_BinaryCanTrap() 2305 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert() 2477 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST() 2618 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_CONVERT_RNDSAT() 3027 if (TLI.isTypeLegal(FixedVT) && in WidenVecOp_EXTEND() 3113 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST() [all …]
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D | LegalizeDAG.cpp | 329 if (TLI.isTypeLegal(intVT)) { in ExpandUnalignedStore() 453 if (TLI.isTypeLegal(intVT) && TLI.isTypeLegal(LoadedVT)) { in ExpandUnalignedLoad() 685 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore() 695 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore() 702 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore() 885 assert(TLI.isTypeLegal(StVT) && in LegalizeStoreOps() 1125 if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps() 1212 TLI.isTypeLegal(Node->getValueType(i))) && in LegalizeOp() 1218 TLI.isTypeLegal(Op.getValueType()) || in LegalizeOp() 1653 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue() [all …]
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D | DAGCombiner.cpp | 485 bool isTypeLegal(const EVT &VT) { in isTypeLegal() function in __anondef5a4330111::DAGCombiner 487 return TLI.isTypeLegal(VT); in isTypeLegal() 2167 if (!TLI.isTypeLegal(VT)) in useDivRem() 2737 TLI.isTypeLegal(Op0VT))) && in SimplifyBinOpWithSameOpcodeHands() 3707 TLI.isTypeLegal(VT) && in visitOR() 3974 if (!TLI.isTypeLegal(VT)) return nullptr; in MatchRotate() 5747 (!LegalTypes || (!LegalOperations && TLI.isTypeLegal(SVT))) && in tryToFoldExtendOfConstant() 7066 if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) { in visitTRUNCATE() 7386 if (isTypeLegal(IntXVT)) { in visitBITCAST() 7457 if (Level < AfterLegalizeDAG && TLI.isTypeLegal(VT) && VT.isVector() && in visitBITCAST() [all …]
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D | LegalizeIntegerTypes.cpp | 216 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap() 596 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_SETCC() 1048 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR() 1190 if (TLI.isTypeLegal(DataVT)) in PromoteIntOp_MSTORE() 2261 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift() 2761 if (TLI.isTypeLegal(LHSLo.getValueType()) && in IntegerExpandSetCCOperands() 2762 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands() 2768 if (TLI.isTypeLegal(LHSHi.getValueType()) && in IntegerExpandSetCCOperands() 2769 TLI.isTypeLegal(RHSHi.getValueType())) in IntegerExpandSetCCOperands()
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D | InstrEmitter.cpp | 107 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg() 226 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters()
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D | LegalizeTypes.h | 71 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 77 return VT.isSimple() && TLI.isTypeLegal(VT); in isSimpleLegalType()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 880 assert(isTypeLegal(VT)); in canOpTrap() 1052 while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) { in getVectorTypeBreakdownMVT() 1060 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT() 1085 if (isTypeLegal(*I)) in isLegalRC() 1216 if (isTypeLegal(IVT)) { in computeRegisterProperties() 1226 if (!isTypeLegal(MVT::ppcf128)) { in computeRegisterProperties() 1235 if (!isTypeLegal(MVT::f128)) { in computeRegisterProperties() 1244 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1253 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties() 1263 if (!isTypeLegal(MVT::f16)) { in computeRegisterProperties() [all …]
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D | Analysis.cpp | 221 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 160 bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false); 279 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic() 319 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal() function in X86FastISel 339 return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT); in isTypeLegal() 979 if (!isTypeLegal(Val->getType(), VT, /*AllowI1=*/true)) in X86SelectStore() 1135 if (!isTypeLegal(LI->getType(), VT, /*AllowI1=*/true)) in X86SelectLoad() 1242 if (!isTypeLegal(I->getOperand(0)->getType(), VT)) in X86SelectCmp() 1334 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt() 1471 isTypeLegal(TI->getOperand(0)->getType(), SourceVT)) { in X86SelectBranch() 1572 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift() [all …]
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/external/llvm/include/llvm/Analysis/ |
D | TargetTransformInfo.h | 347 bool isTypeLegal(Type *Ty) const; 582 virtual bool isTypeLegal(Type *Ty) = 0; 723 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); } in isTypeLegal() function
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D | TargetTransformInfoImpl.h | 234 bool isTypeLegal(Type *Ty) { return false; } in isTypeLegal() function
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 407 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 560 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrCustom() 569 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrPromote() 578 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand() 583 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal() 629 return isTypeLegal(ValVT) && MemVT.isSimple() && in isTruncStoreLegal() 713 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 2248 return isTypeLegal(VT); in isTypeDesirableForOp()
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/external/llvm/lib/Analysis/ |
D | TargetTransformInfo.cpp | 151 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo 152 return TTIImpl->isTypeLegal(Ty); in isTypeLegal()
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D | VectorUtils.cpp | 464 !TTI->isTypeLegal(I.getOperand(0)->getType())) in computeMinimumValueSizes() 473 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType())) in computeMinimumValueSizes()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 145 bool isTypeLegal(Type *Ty, MVT &VT); 265 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel 274 return TLI.isTypeLegal(VT); in isTypeLegal() 280 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 989 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP() 1098 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI() 1110 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI() 1471 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall() 1517 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 167 bool isTypeLegal(Type *Ty, MVT &VT); 732 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel 741 return TLI.isTypeLegal(VT); in isTypeLegal() 745 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1549 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP() 1593 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI() 1621 if (!isTypeLegal(I->getType(), VT)) in SelectSelect() 1698 if (!isTypeLegal(Ty, VT)) in SelectDiv() 1726 if (!isTypeLegal(Ty, VT)) in SelectRem() 2195 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall() [all …]
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D | ARMISelLowering.cpp | 3429 if (!DAG.getTargetLoweringInfo().isTypeLegal(Op.getValueType())) in LowerXALUO() 3460 if (!DAG.getTargetLoweringInfo().isTypeLegal(Cond->getValueType(0))) in LowerSELECT() 4205 if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) { in ExpandBITCAST() 4220 if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) { in ExpandBITCAST() 8816 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformANDCombine() 8859 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformORCombine() 8899 DAG.getTargetLoweringInfo().isTypeLegal(VT)) { in PerformORCombine() 9053 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformXORCombine() 9370 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine() 9456 if (!TLI.isTypeLegal(VT) || in PerformVECTOR_SHUFFLECombine() [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | BasicTTIImpl.h | 150 bool isTypeLegal(Type *Ty) { in isTypeLegal() function 152 return getTLI()->isTypeLegal(VT); in isTypeLegal() 190 return TLI->isTypeLegal(VT) && in haveFastSqrt()
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 111 bool isTypeLegal(Type *Ty, MVT &VT); 540 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel 549 return TLI.isTypeLegal(VT); in isTypeLegal() 556 if (isTypeLegal(Ty, VT)) in isTypeSupported() 568 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal() 1041 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt() 1049 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt() 1278 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 140 bool isTypeLegal(Type *Ty, MVT &VT); 483 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero() 909 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in AArch64FastISel 923 return TLI.isTypeLegal(VT); in isTypeLegal() 934 if (isTypeLegal(Ty, VT)) in isTypeSupported() 2721 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt() 2754 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectIntToFP() 3063 else if (!isTypeLegal(CLI.RetTy, RetVT)) in fastLowerCall() 3076 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall() 3227 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic() [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 2302 && (!hasHardQuad || !TLI.isTypeLegal(VT))) { in LowerFP_TO_SINT() 2310 if (!TLI.isTypeLegal(VT)) in LowerFP_TO_SINT() 2333 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP() 2341 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP() 2359 (hasHardQuad && TLI.isTypeLegal(VT))) in LowerFP_TO_UINT() 2380 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
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