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Searched refs:Op0 (Results 1 – 25 of 83) sorted by relevance

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/external/llvm/lib/Analysis/
DInstructionSimplify.cpp148 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) in ExpandBinOp() local
149 if (Op0->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
151 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in ExpandBinOp()
207 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in SimplifyAssociativeBinOp() local
211 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
212 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
213 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
253 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
254 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
255 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
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/external/llvm/lib/Transforms/InstCombine/
DInstCombineMulDivRem.cpp177 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
182 if (Value *V = SimplifyMulInst(Op0, Op1, DL, TLI, DT, AC)) in visitMul()
190 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName()); in visitMul()
252 if (Op0->hasOneUse()) { in visitMul()
255 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) in visitMul()
257 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1)))) in visitMul()
271 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in visitMul()
275 if (isa<PHINode>(Op0)) in visitMul()
283 if (match(Op0, m_OneUse(m_Add(m_Value(X), m_Constant(C1))))) { in visitMul()
293 if (Value *Op0v = dyn_castNegVal(Op0)) { // -X * -Y = X*Y in visitMul()
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DInstCombineAndOrXor.cpp890 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in FoldAndOfICmps() local
893 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder); in FoldAndOfICmps()
1216 Value *Op0 = I.getOperand(0); in matchDeMorgansLaws() local
1219 if (Value *Op0NotVal = dyn_castNotVal(Op0)) in matchDeMorgansLaws()
1221 if (Op0->hasOneUse() && Op1->hasOneUse()) { in matchDeMorgansLaws()
1233 if (match(Op0, m_OneUse(m_Xor(m_ZExt(m_Value(A)), m_ConstantInt(C1)))) && in matchDeMorgansLaws()
1252 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAnd() local
1257 if (Value *V = SimplifyAndInst(Op0, Op1, DL, TLI, DT, AC)) in visitAnd()
1276 if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) { in visitAnd()
1359 if (match(Op0, m_Trunc(m_And(m_Value(X), m_ConstantInt(YC))))) { in visitAnd()
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DInstCombineCompares.cpp2592 static bool swapMayExposeCSEOpportunities(const Value * Op0, in swapMayExposeCSEOpportunities() argument
2596 if (Op0->getType()->isPointerTy()) in swapMayExposeCSEOpportunities()
2606 for (const User *U : Op0->users()) { in swapMayExposeCSEOpportunities()
2614 if (BinOp->getOperand(Op1Idx) == Op0) { in swapMayExposeCSEOpportunities()
2743 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitICmpInst() local
2744 unsigned Op0Cplxity = getComplexity(Op0); in visitICmpInst()
2752 swapMayExposeCSEOpportunities(Op0, Op1))) { in visitICmpInst()
2754 std::swap(Op0, Op1); in visitICmpInst()
2759 SimplifyICmpInst(I.getPredicate(), Op0, Op1, DL, TLI, DT, AC, &I)) in visitICmpInst()
2767 if (match(Op0, m_Select(m_Value(Cond), m_Value(SelectTrue), in visitICmpInst()
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DInstCombineShifts.cpp26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
33 if (isa<Constant>(Op0)) in commonShiftTransforms()
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, in FoldShiftByConstant() argument
339 CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this, &I)) { in FoldShiftByConstant()
341 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n"); in FoldShiftByConstant()
344 I, GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift, *this, DL)); in FoldShiftByConstant()
349 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits(); in FoldShiftByConstant()
355 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0)) in FoldShiftByConstant()
362 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in FoldShiftByConstant()
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DInstCombineAddSub.cpp1493 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSub() local
1498 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(), in visitSub()
1508 BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V); in visitSub()
1524 return BinaryOperator::CreateXor(Op0, Op1); in visitSub()
1527 if (match(Op0, m_AllOnes())) in visitSub()
1530 if (Constant *C = dyn_cast<Constant>(Op0)) { in visitSub()
1560 if (ConstantInt *C = dyn_cast<ConstantInt>(Op0)) { in visitSub()
1594 if (match(Op1, m_Add(m_Specific(Op0), m_Value(Y))) || in visitSub()
1595 match(Op1, m_Add(m_Value(Y), m_Specific(Op0)))) in visitSub()
1599 if (match(Op0, m_Sub(m_Specific(Op1), m_Value(Y)))) in visitSub()
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DInstCombineCalls.cpp386 static Value *SimplifyX86extrq(IntrinsicInst &II, Value *Op0, in SimplifyX86extrq() argument
397 Constant *C0 = dyn_cast<Constant>(Op0); in SimplifyX86extrq()
448 Builder.CreateBitCast(Op0, ShufTy), in SimplifyX86extrq()
463 Value *Args[] = {Op0, CILength, CIIndex}; in SimplifyX86extrq()
479 static Value *SimplifyX86insertq(IntrinsicInst &II, Value *Op0, Value *Op1, in SimplifyX86insertq() argument
528 Value *SV = Builder.CreateShuffleVector(Builder.CreateBitCast(Op0, ShufTy), in SimplifyX86insertq()
535 Constant *C0 = dyn_cast<Constant>(Op0); in SimplifyX86insertq()
565 Value *Args[] = {Op0, Op1, CILength, CIIndex}; in SimplifyX86insertq()
1208 Value *Op0 = II->getArgOperand(0); in visitCallInst() local
1210 unsigned VWidth0 = Op0->getType()->getVectorNumElements(); in visitCallInst()
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DInstructionCombining.cpp201 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0)); in SimplifyAssociativeOrCommutative() local
206 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
207 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
208 Value *B = Op0->getOperand(1); in SimplifyAssociativeOrCommutative()
219 (!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) { in SimplifyAssociativeOrCommutative()
257 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
258 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
259 Value *B = Op0->getOperand(1); in SimplifyAssociativeOrCommutative()
298 if (Op0 && Op1 && in SimplifyAssociativeOrCommutative()
299 Op0->getOpcode() == Opcode && Op1->getOpcode() == Opcode && in SimplifyAssociativeOrCommutative()
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/external/llvm/lib/Transforms/Scalar/
DScalarizer.cpp74 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
76 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); in operator ()()
85 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
87 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); in operator ()()
96 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
98 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); in operator ()()
381 Scatterer Op0 = scatter(&I, I.getOperand(0)); in splitBinary() local
383 assert(Op0.size() == NumElems && "Mismatched binary operation"); in splitBinary()
388 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem], in splitBinary()
409 Scatterer Op0 = scatter(&SI, SI.getOperand(0)); in visitSelectInst() local
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DCorrelatedValuePropagation.cpp194 Value *Op0 = C->getOperand(0); in processCmp() local
203 auto *I = dyn_cast<Instruction>(Op0); in processCmp()
208 LVI->getPredicateAt(C->getPredicate(), Op0, Op1, C); in processCmp()
346 Value *Op0 = C->getOperand(0); in getConstantAt() local
351 LVI->getPredicateAt(C->getPredicate(), Op0, Op1, At); in getConstantAt()
/external/llvm/include/llvm/CodeGen/
DFastISel.h341 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
346 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
352 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
358 virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
365 unsigned Op0, bool Op0IsKill, unsigned Op1,
373 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
394 const TargetRegisterClass *RC, unsigned Op0,
400 const TargetRegisterClass *RC, unsigned Op0,
406 const TargetRegisterClass *RC, unsigned Op0,
413 const TargetRegisterClass *RC, unsigned Op0,
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/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp422 unsigned Op0 = getRegForValue(I->getOperand(0)); in selectBinaryOp() local
423 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBinaryOp()
445 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
458 ISDOpcode, Op0, Op0IsKill, CF); in selectBinaryOp()
473 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
1296 unsigned Op0 = getRegForValue(I->getOperand(0)); in selectBitCast() local
1297 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBitCast()
1310 TII.get(TargetOpcode::COPY), ResultReg).addReg(Op0); in selectBitCast()
1316 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1511 const Value *Op0 = EVI->getOperand(0); in selectExtractValue() local
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/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp45 : Op0(Op0In), Op1(Op1In), Opcode(0), ICmpType(0), CCValid(0), CCMask(0) {} in Comparison()
48 SDValue Op0, Op1; member
1564 if (!C.Op0.hasOneUse() || in adjustSubwordCmp()
1565 C.Op0.getOpcode() != ISD::LOAD || in adjustSubwordCmp()
1570 auto *Load = cast<LoadSDNode>(C.Op0); in adjustSubwordCmp()
1615 if (C.Op0.getValueType() != MVT::i32 || in adjustSubwordCmp()
1617 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32, in adjustSubwordCmp()
1655 if (C.Op0.getValueType() == MVT::f128) in shouldSwapCmpOperands()
1677 if (isNaturalMemoryOperand(C.Op0, C.ICmpType) && C.Op0.hasOneUse()) { in shouldSwapCmpOperands()
1696 unsigned Opcode0 = C.Op0.getOpcode(); in shouldSwapCmpOperands()
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DSystemZISelDAGToDAG.cpp302 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
417 SDValue Op0, uint64_t Op1) { in expandDisp() argument
421 changeComponent(AM, IsBase, Op0); in expandDisp()
440 SDValue Op0 = N.getOperand(0); in expandAddress() local
443 unsigned Op0Code = Op0->getOpcode(); in expandAddress()
449 return expandAdjDynAlloc(AM, IsBase, Op0); in expandAddress()
453 cast<ConstantSDNode>(Op0)->getSExtValue()); in expandAddress()
455 return expandDisp(AM, IsBase, Op0, in expandAddress()
458 if (IsBase && expandIndex(AM, Op0, Op1)) in expandAddress()
1004 SDValue Op0 = N->getOperand(I ^ 1); in tryRxSBG() local
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/external/llvm/lib/Target/X86/
DX86FloatingPoint.cpp1140 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); in handleTwoArgFP() local
1142 bool KillsOp0 = MI->killsRegister(X86::FP0+Op0); in handleTwoArgFP()
1150 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? in handleTwoArgFP()
1155 moveToTop(Op0, I); // Move dead operand to TOS. in handleTwoArgFP()
1156 TOS = Op0; in handleTwoArgFP()
1166 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1167 Op0 = TOS = Dest; in handleTwoArgFP()
1174 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1175 Op0 = TOS = Dest; in handleTwoArgFP()
1181 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && in handleTwoArgFP()
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/external/llvm/lib/Target/Hexagon/
DHexagonExpandPredSpillCode.cpp101 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
112 NewMI->addOperand(Op0); in runOnMachineFunction()
144 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
156 NewMI->addOperand(Op0); in runOnMachineFunction()
186 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
197 NewMI->addOperand(Op0); in runOnMachineFunction()
223 MachineOperand &Op0 = MI->getOperand(0); in runOnMachineFunction() local
233 NewMI->addOperand(Op0); in runOnMachineFunction()
DHexagonSplitDouble.cpp671 MachineOperand &Op0 = MI->getOperand(0); in splitImmediate() local
673 assert(Op0.isReg() && Op1.isImm()); in splitImmediate()
678 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitImmediate()
699 MachineOperand &Op0 = MI->getOperand(0); in splitCombine() local
702 assert(Op0.isReg()); in splitCombine()
706 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitCombine()
732 MachineOperand &Op0 = MI->getOperand(0); in splitExt() local
734 assert(Op0.isReg() && Op1.isReg()); in splitExt()
738 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitExt()
753 MachineOperand &Op0 = MI->getOperand(0); in splitShift() local
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/external/llvm/lib/ExecutionEngine/
DExecutionEngine.cpp647 Constant *Op0 = CE->getOperand(0); in getConstantValue() local
651 GenericValue Result = getConstantValue(Op0); in getConstantValue()
660 GenericValue GV = getConstantValue(Op0); in getConstantValue()
666 GenericValue GV = getConstantValue(Op0); in getConstantValue()
672 GenericValue GV = getConstantValue(Op0); in getConstantValue()
679 GenericValue GV = getConstantValue(Op0); in getConstantValue()
685 GenericValue GV = getConstantValue(Op0); in getConstantValue()
690 GenericValue GV = getConstantValue(Op0); in getConstantValue()
705 GenericValue GV = getConstantValue(Op0); in getConstantValue()
721 GenericValue GV = getConstantValue(Op0); in getConstantValue()
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/external/llvm/lib/Target/ARM/
DARMFastISel.cpp108 unsigned Op0, bool Op0IsKill);
111 unsigned Op0, bool Op0IsKill,
115 unsigned Op0, bool Op0IsKill,
120 unsigned Op0, bool Op0IsKill,
124 unsigned Op0, bool Op0IsKill,
286 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
292 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_r()
295 ResultReg).addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
298 .addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
308 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
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DARMLoadStoreOptimizer.cpp1910 bool CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl,
1991 static void concatenateMemOperands(MachineInstr *MI, MachineInstr *Op0, in concatenateMemOperands() argument
1994 size_t numMemRefs = (Op0->memoperands_end() - Op0->memoperands_begin()) in concatenateMemOperands()
2000 std::copy(Op0->memoperands_begin(), Op0->memoperands_end(), MemBegin); in concatenateMemOperands()
2007 ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, in CanFormLdStDWord() argument
2021 unsigned Opcode = Op0->getOpcode(); in CanFormLdStDWord()
2041 if (!Op0->hasOneMemOperand() || in CanFormLdStDWord()
2042 (*Op0->memoperands_begin())->isVolatile()) in CanFormLdStDWord()
2045 unsigned Align = (*Op0->memoperands_begin())->getAlignment(); in CanFormLdStDWord()
2054 int OffImm = getMemoryOpOffset(Op0); in CanFormLdStDWord()
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/external/llvm/lib/IR/
DAutoUpgrade.cpp568 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
580 Rep = Builder.CreateShuffleVector(Op0, Op1, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
585 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
626 Rep = Builder.CreateShuffleVector(Op0, Rep, ConstantVector::get(Idxs2)); in UpgradeIntrinsicCall()
631 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
646 Value *UndefV = UndefValue::get(Op0->getType()); in UpgradeIntrinsicCall()
647 Rep = Builder.CreateShuffleVector(Op0, UndefV, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
660 Value *Op0 = CI->getArgOperand(0); in UpgradeIntrinsicCall() local
681 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs)); in UpgradeIntrinsicCall()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp194 unsigned emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, int64_t Imm);
212 unsigned emitMul_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
214 unsigned emitSMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
216 unsigned emitUMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
1486 unsigned AArch64FastISel::emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, in emitAdd_ri_() argument
1490 ResultReg = emitAddSub_ri(false, VT, Op0, Op0IsKill, -Imm); in emitAdd_ri_()
1492 ResultReg = emitAddSub_ri(true, VT, Op0, Op0IsKill, Imm); in emitAdd_ri_()
1501 ResultReg = emitAddSub_rr(true, VT, Op0, Op0IsKill, CReg, true); in emitAdd_ri_()
2063 const Value *Op0 = I->getOperand(0); in selectStore() local
2067 if (!isTypeSupported(Op0->getType(), VT, /*IsVectorAllowed=*/true) || in selectStore()
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/external/llvm/include/llvm/IR/
DGetElementPtrTypeIterator.h128 gep_type_begin(Type *Op0, ArrayRef<T> A) { in gep_type_begin() argument
129 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin()); in gep_type_begin()
DPatternMatch.h1234 inline typename m_Intrinsic_Ty<T0>::Ty m_Intrinsic(const T0 &Op0) {
1235 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
1239 inline typename m_Intrinsic_Ty<T0, T1>::Ty m_Intrinsic(const T0 &Op0,
1241 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
1246 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) {
1247 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
1253 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) {
1254 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1, Op2), m_Argument<3>(Op3));
1259 inline typename m_Intrinsic_Ty<Opnd0>::Ty m_BSwap(const Opnd0 &Op0) {
1260 return m_Intrinsic<Intrinsic::bswap>(Op0);
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/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp554 SDValue Op0 = N->getOperand(0); in performANDCombine() local
556 unsigned Op0Opcode = Op0->getOpcode(); in performANDCombine()
574 SDValue Op0Op2 = Op0->getOperand(2); in performANDCombine()
581 SDValue Ops[] = { Op0->getOperand(0), Op0->getOperand(1), Op0Op2 }; in performANDCombine()
582 return DAG.getNode(MipsISD::VEXTRACT_ZEXT_ELT, SDLoc(Op0), in performANDCombine()
583 Op0->getVTList(), in performANDCombine()
584 makeArrayRef(Ops, Op0->getNumOperands())); in performANDCombine()
674 SDValue Op0 = N->getOperand(0); in performORCombine() local
677 if (Op0->getOpcode() == ISD::AND && Op1->getOpcode() == ISD::AND) { in performORCombine()
678 SDValue Op0Op0 = Op0->getOperand(0); in performORCombine()
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