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1# Instructions that are available for the current ISA but should be rejected by
2# the assembler (e.g. invalid set of operands or operand's restrictions not met).
3
4# RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r6 2>%t1
5# RUN: FileCheck %s < %t1
6
7        .text
8local_label:
9        .set noreorder
10        .set noat
11        align   $4, $2, $3, -1    # CHECK: :[[@LINE]]:29: error: expected 2-bit unsigned immediate
12        align   $4, $2, $3, 4     # CHECK: :[[@LINE]]:29: error: expected 2-bit unsigned immediate
13        jalr.hb $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
14        jalr.hb $31, $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
15        ldc2    $8,-21181($at)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16        sdc2    $20,23157($s2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17        swc2    $25,24880($s0)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18        break -1          # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
19        break 1024        # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
20        break -1, 5       # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
21        break 1024, 5     # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
22        break 7, -1       # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
23        break 7, 1024     # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
24        break 1024, 1024  # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
25        // FIXME: Following tests are temporarely disabled, until "PredicateControl not in hierarchy" problem is resolved
26        bltl  $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27        bltul $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
28        blel  $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29        bleul $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30        bgel  $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
31        bgeul $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32        bgtl  $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
33        bgtul $7, $8, local_label  # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
34        cache -1, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
35        cache 32, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
36        jalr.hb $31          # CHECK: :[[@LINE]]:9: error: source and destination must be different
37        jalr.hb $31, $31     # CHECK: :[[@LINE]]:9: error: source and destination must be different
38        lsa $2, $3, $4, 0    # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
39        lsa $2, $3, $4, 5    # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
40        pref -1, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
41        pref 32, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
42