1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "src/base/cpu.h"
6
7 #if V8_LIBC_MSVCRT
8 #include <intrin.h> // __cpuid()
9 #endif
10 #if V8_OS_LINUX
11 #include <linux/auxvec.h> // AT_HWCAP
12 #endif
13 #if V8_GLIBC_PREREQ(2, 16)
14 #include <sys/auxv.h> // getauxval()
15 #endif
16 #if V8_OS_QNX
17 #include <sys/syspage.h> // cpuinfo
18 #endif
19 #if V8_OS_LINUX && V8_HOST_ARCH_PPC
20 #include <elf.h>
21 #endif
22 #if V8_OS_AIX
23 #include <sys/systemcfg.h> // _system_configuration
24 #ifndef POWER_8
25 #define POWER_8 0x10000
26 #endif
27 #endif
28 #if V8_OS_POSIX
29 #include <unistd.h> // sysconf()
30 #endif
31
32 #include <ctype.h>
33 #include <limits.h>
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37 #include <algorithm>
38
39 #include "src/base/logging.h"
40 #if V8_OS_WIN
41 #include "src/base/win32-headers.h" // NOLINT
42 #endif
43
44 namespace v8 {
45 namespace base {
46
47 #if defined(__pnacl__)
48 // Portable host shouldn't do feature detection.
49 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
50
51 // Define __cpuid() for non-MSVC libraries.
52 #if !V8_LIBC_MSVCRT
53
54 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) {
55 // Clear ecx to align with __cpuid() of MSVC:
56 // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx
57 #if defined(__i386__) && defined(__pic__)
58 // Make sure to preserve ebx, which contains the pointer
59 // to the GOT in case we're generating PIC.
60 __asm__ volatile(
61 "mov %%ebx, %%edi\n\t"
62 "cpuid\n\t"
63 "xchg %%edi, %%ebx\n\t"
64 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
65 "=d"(cpu_info[3])
66 : "a"(info_type), "c"(0));
67 #else
68 __asm__ volatile("cpuid \n\t"
69 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
70 "=d"(cpu_info[3])
71 : "a"(info_type), "c"(0));
72 #endif // defined(__i386__) && defined(__pic__)
73 }
74
75 #endif // !V8_LIBC_MSVCRT
76
77 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \
78 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
79
80 #if V8_OS_LINUX
81
82 #if V8_HOST_ARCH_ARM
83
84 // See <uapi/asm/hwcap.h> kernel header.
85 /*
86 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
87 */
88 #define HWCAP_SWP (1 << 0)
89 #define HWCAP_HALF (1 << 1)
90 #define HWCAP_THUMB (1 << 2)
91 #define HWCAP_26BIT (1 << 3) /* Play it safe */
92 #define HWCAP_FAST_MULT (1 << 4)
93 #define HWCAP_FPA (1 << 5)
94 #define HWCAP_VFP (1 << 6)
95 #define HWCAP_EDSP (1 << 7)
96 #define HWCAP_JAVA (1 << 8)
97 #define HWCAP_IWMMXT (1 << 9)
98 #define HWCAP_CRUNCH (1 << 10)
99 #define HWCAP_THUMBEE (1 << 11)
100 #define HWCAP_NEON (1 << 12)
101 #define HWCAP_VFPv3 (1 << 13)
102 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
103 #define HWCAP_TLS (1 << 15)
104 #define HWCAP_VFPv4 (1 << 16)
105 #define HWCAP_IDIVA (1 << 17)
106 #define HWCAP_IDIVT (1 << 18)
107 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
108 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
109 #define HWCAP_LPAE (1 << 20)
110
111 static uint32_t ReadELFHWCaps() {
112 uint32_t result = 0;
113 #if V8_GLIBC_PREREQ(2, 16)
114 result = static_cast<uint32_t>(getauxval(AT_HWCAP));
115 #else
116 // Read the ELF HWCAP flags by parsing /proc/self/auxv.
117 FILE* fp = fopen("/proc/self/auxv", "r");
118 if (fp != NULL) {
119 struct { uint32_t tag; uint32_t value; } entry;
120 for (;;) {
121 size_t n = fread(&entry, sizeof(entry), 1, fp);
122 if (n == 0 || (entry.tag == 0 && entry.value == 0)) {
123 break;
124 }
125 if (entry.tag == AT_HWCAP) {
126 result = entry.value;
127 break;
128 }
129 }
130 fclose(fp);
131 }
132 #endif
133 return result;
134 }
135
136 #endif // V8_HOST_ARCH_ARM
137
138 #if V8_HOST_ARCH_MIPS
139 int __detect_fp64_mode(void) {
140 double result = 0;
141 // Bit representation of (double)1 is 0x3FF0000000000000.
142 __asm__ volatile(
143 ".set push\n\t"
144 ".set noreorder\n\t"
145 ".set oddspreg\n\t"
146 "lui $t0, 0x3FF0\n\t"
147 "ldc1 $f0, %0\n\t"
148 "mtc1 $t0, $f1\n\t"
149 "sdc1 $f0, %0\n\t"
150 ".set pop\n\t"
151 : "+m"(result)
152 :
153 : "t0", "$f0", "$f1", "memory");
154
155 return !(result == 1);
156 }
157
158
159 int __detect_mips_arch_revision(void) {
160 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
161 // kernel.
162 uint32_t result = 0;
163 __asm__ volatile(
164 "move $v0, $zero\n\t"
165 // Encoding for "addi $v0, $v0, 1" on non-r6,
166 // which is encoding for "bovc $v0, %v0, 1" on r6.
167 // Use machine code directly to avoid compilation errors with different
168 // toolchains and maintain compatibility.
169 ".word 0x20420001\n\t"
170 "sw $v0, %0\n\t"
171 : "=m"(result)
172 :
173 : "v0", "memory");
174 // Result is 0 on r6 architectures, 1 on other architecture revisions.
175 // Fall-back to the least common denominator which is mips32 revision 1.
176 return result ? 1 : 6;
177 }
178 #endif
179
180 // Extract the information exposed by the kernel via /proc/cpuinfo.
181 class CPUInfo final {
182 public:
183 CPUInfo() : datalen_(0) {
184 // Get the size of the cpuinfo file by reading it until the end. This is
185 // required because files under /proc do not always return a valid size
186 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed.
187 static const char PATHNAME[] = "/proc/cpuinfo";
188 FILE* fp = fopen(PATHNAME, "r");
189 if (fp != NULL) {
190 for (;;) {
191 char buffer[256];
192 size_t n = fread(buffer, 1, sizeof(buffer), fp);
193 if (n == 0) {
194 break;
195 }
196 datalen_ += n;
197 }
198 fclose(fp);
199 }
200
201 // Read the contents of the cpuinfo file.
202 data_ = new char[datalen_ + 1];
203 fp = fopen(PATHNAME, "r");
204 if (fp != NULL) {
205 for (size_t offset = 0; offset < datalen_; ) {
206 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp);
207 if (n == 0) {
208 break;
209 }
210 offset += n;
211 }
212 fclose(fp);
213 }
214
215 // Zero-terminate the data.
216 data_[datalen_] = '\0';
217 }
218
219 ~CPUInfo() {
220 delete[] data_;
221 }
222
223 // Extract the content of a the first occurence of a given field in
224 // the content of the cpuinfo file and return it as a heap-allocated
225 // string that must be freed by the caller using delete[].
226 // Return NULL if not found.
227 char* ExtractField(const char* field) const {
228 DCHECK(field != NULL);
229
230 // Look for first field occurence, and ensure it starts the line.
231 size_t fieldlen = strlen(field);
232 char* p = data_;
233 for (;;) {
234 p = strstr(p, field);
235 if (p == NULL) {
236 return NULL;
237 }
238 if (p == data_ || p[-1] == '\n') {
239 break;
240 }
241 p += fieldlen;
242 }
243
244 // Skip to the first colon followed by a space.
245 p = strchr(p + fieldlen, ':');
246 if (p == NULL || !isspace(p[1])) {
247 return NULL;
248 }
249 p += 2;
250
251 // Find the end of the line.
252 char* q = strchr(p, '\n');
253 if (q == NULL) {
254 q = data_ + datalen_;
255 }
256
257 // Copy the line into a heap-allocated buffer.
258 size_t len = q - p;
259 char* result = new char[len + 1];
260 if (result != NULL) {
261 memcpy(result, p, len);
262 result[len] = '\0';
263 }
264 return result;
265 }
266
267 private:
268 char* data_;
269 size_t datalen_;
270 };
271
272 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
273
274 // Checks that a space-separated list of items contains one given 'item'.
275 static bool HasListItem(const char* list, const char* item) {
276 ssize_t item_len = strlen(item);
277 const char* p = list;
278 if (p != NULL) {
279 while (*p != '\0') {
280 // Skip whitespace.
281 while (isspace(*p)) ++p;
282
283 // Find end of current list item.
284 const char* q = p;
285 while (*q != '\0' && !isspace(*q)) ++q;
286
287 if (item_len == q - p && memcmp(p, item, item_len) == 0) {
288 return true;
289 }
290
291 // Skip to next item.
292 p = q;
293 }
294 }
295 return false;
296 }
297
298 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
299
300 #endif // V8_OS_LINUX
301
302 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
303
CPU()304 CPU::CPU()
305 : stepping_(0),
306 model_(0),
307 ext_model_(0),
308 family_(0),
309 ext_family_(0),
310 type_(0),
311 implementer_(0),
312 architecture_(0),
313 variant_(-1),
314 part_(0),
315 icache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
316 dcache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
317 has_fpu_(false),
318 has_cmov_(false),
319 has_sahf_(false),
320 has_mmx_(false),
321 has_sse_(false),
322 has_sse2_(false),
323 has_sse3_(false),
324 has_ssse3_(false),
325 has_sse41_(false),
326 has_sse42_(false),
327 is_atom_(false),
328 has_osxsave_(false),
329 has_avx_(false),
330 has_fma3_(false),
331 has_bmi1_(false),
332 has_bmi2_(false),
333 has_lzcnt_(false),
334 has_popcnt_(false),
335 has_idiva_(false),
336 has_neon_(false),
337 has_thumb2_(false),
338 has_vfp_(false),
339 has_vfp3_(false),
340 has_vfp3_d32_(false),
341 is_fp64_mode_(false),
342 has_non_stop_time_stamp_counter_(false) {
343 memcpy(vendor_, "Unknown", 8);
344 #if V8_OS_NACL
345 // Portable host shouldn't do feature detection.
346 // TODO(jfb): Remove the hardcoded ARM simulator flags in the build, and
347 // hardcode them here instead.
348 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
349 int cpu_info[4];
350
351 // __cpuid with an InfoType argument of 0 returns the number of
352 // valid Ids in CPUInfo[0] and the CPU identification string in
353 // the other three array elements. The CPU identification string is
354 // not in linear order. The code below arranges the information
355 // in a human readable form. The human readable order is CPUInfo[1] |
356 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
357 // before using memcpy to copy these three array elements to cpu_string.
358 __cpuid(cpu_info, 0);
359 unsigned num_ids = cpu_info[0];
360 std::swap(cpu_info[2], cpu_info[3]);
361 memcpy(vendor_, cpu_info + 1, 12);
362 vendor_[12] = '\0';
363
364 // Interpret CPU feature information.
365 if (num_ids > 0) {
366 __cpuid(cpu_info, 1);
367 stepping_ = cpu_info[0] & 0xf;
368 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
369 family_ = (cpu_info[0] >> 8) & 0xf;
370 type_ = (cpu_info[0] >> 12) & 0x3;
371 ext_model_ = (cpu_info[0] >> 16) & 0xf;
372 ext_family_ = (cpu_info[0] >> 20) & 0xff;
373 has_fpu_ = (cpu_info[3] & 0x00000001) != 0;
374 has_cmov_ = (cpu_info[3] & 0x00008000) != 0;
375 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
376 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
377 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
378 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
379 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
380 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
381 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
382 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
383 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0;
384 has_avx_ = (cpu_info[2] & 0x10000000) != 0;
385 has_fma3_ = (cpu_info[2] & 0x00001000) != 0;
386
387 if (family_ == 0x6) {
388 switch (model_) {
389 case 0x1c: // SLT
390 case 0x26:
391 case 0x36:
392 case 0x27:
393 case 0x35:
394 case 0x37: // SLM
395 case 0x4a:
396 case 0x4d:
397 case 0x4c: // AMT
398 case 0x6e:
399 is_atom_ = true;
400 }
401 }
402 }
403
404 // There are separate feature flags for VEX-encoded GPR instructions.
405 if (num_ids >= 7) {
406 __cpuid(cpu_info, 7);
407 has_bmi1_ = (cpu_info[1] & 0x00000008) != 0;
408 has_bmi2_ = (cpu_info[1] & 0x00000100) != 0;
409 }
410
411 // Query extended IDs.
412 __cpuid(cpu_info, 0x80000000);
413 unsigned num_ext_ids = cpu_info[0];
414
415 // Interpret extended CPU feature information.
416 if (num_ext_ids > 0x80000000) {
417 __cpuid(cpu_info, 0x80000001);
418 has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0;
419 // SAHF must be probed in long mode.
420 has_sahf_ = (cpu_info[2] & 0x00000001) != 0;
421 }
422
423 // Check if CPU has non stoppable time stamp counter.
424 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007;
425 if (num_ext_ids >= parameter_containing_non_stop_time_stamp_counter) {
426 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
427 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
428 }
429
430 #elif V8_HOST_ARCH_ARM
431
432 #if V8_OS_LINUX
433
434 CPUInfo cpu_info;
435
436 // Extract implementor from the "CPU implementer" field.
437 char* implementer = cpu_info.ExtractField("CPU implementer");
438 if (implementer != NULL) {
439 char* end;
440 implementer_ = strtol(implementer, &end, 0);
441 if (end == implementer) {
442 implementer_ = 0;
443 }
444 delete[] implementer;
445 }
446
447 char* variant = cpu_info.ExtractField("CPU variant");
448 if (variant != NULL) {
449 char* end;
450 variant_ = strtol(variant, &end, 0);
451 if (end == variant) {
452 variant_ = -1;
453 }
454 delete[] variant;
455 }
456
457 // Extract part number from the "CPU part" field.
458 char* part = cpu_info.ExtractField("CPU part");
459 if (part != NULL) {
460 char* end;
461 part_ = strtol(part, &end, 0);
462 if (end == part) {
463 part_ = 0;
464 }
465 delete[] part;
466 }
467
468 // Extract architecture from the "CPU Architecture" field.
469 // The list is well-known, unlike the the output of
470 // the 'Processor' field which can vary greatly.
471 // See the definition of the 'proc_arch' array in
472 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
473 // same file.
474 char* architecture = cpu_info.ExtractField("CPU architecture");
475 if (architecture != NULL) {
476 char* end;
477 architecture_ = strtol(architecture, &end, 10);
478 if (end == architecture) {
479 // Kernels older than 3.18 report "CPU architecture: AArch64" on ARMv8.
480 if (strcmp(architecture, "AArch64") == 0) {
481 architecture_ = 8;
482 } else {
483 architecture_ = 0;
484 }
485 }
486 delete[] architecture;
487
488 // Unfortunately, it seems that certain ARMv6-based CPUs
489 // report an incorrect architecture number of 7!
490 //
491 // See http://code.google.com/p/android/issues/detail?id=10812
492 //
493 // We try to correct this by looking at the 'elf_platform'
494 // field reported by the 'Processor' field, which is of the
495 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
496 // an ARMv6-one. For example, the Raspberry Pi is one popular
497 // ARMv6 device that reports architecture 7.
498 if (architecture_ == 7) {
499 char* processor = cpu_info.ExtractField("Processor");
500 if (HasListItem(processor, "(v6l)")) {
501 architecture_ = 6;
502 }
503 delete[] processor;
504 }
505
506 // elf_platform moved to the model name field in Linux v3.8.
507 if (architecture_ == 7) {
508 char* processor = cpu_info.ExtractField("model name");
509 if (HasListItem(processor, "(v6l)")) {
510 architecture_ = 6;
511 }
512 delete[] processor;
513 }
514 }
515
516 // Try to extract the list of CPU features from ELF hwcaps.
517 uint32_t hwcaps = ReadELFHWCaps();
518 if (hwcaps != 0) {
519 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0;
520 has_neon_ = (hwcaps & HWCAP_NEON) != 0;
521 has_vfp_ = (hwcaps & HWCAP_VFP) != 0;
522 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0;
523 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 ||
524 (hwcaps & HWCAP_VFPD32) != 0));
525 } else {
526 // Try to fallback to "Features" CPUInfo field.
527 char* features = cpu_info.ExtractField("Features");
528 has_idiva_ = HasListItem(features, "idiva");
529 has_neon_ = HasListItem(features, "neon");
530 has_thumb2_ = HasListItem(features, "thumb2");
531 has_vfp_ = HasListItem(features, "vfp");
532 if (HasListItem(features, "vfpv3d16")) {
533 has_vfp3_ = true;
534 } else if (HasListItem(features, "vfpv3")) {
535 has_vfp3_ = true;
536 has_vfp3_d32_ = true;
537 }
538 delete[] features;
539 }
540
541 // Some old kernels will report vfp not vfpv3. Here we make an attempt
542 // to detect vfpv3 by checking for vfp *and* neon, since neon is only
543 // available on architectures with vfpv3. Checking neon on its own is
544 // not enough as it is possible to have neon without vfp.
545 if (has_vfp_ && has_neon_) {
546 has_vfp3_ = true;
547 }
548
549 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6.
550 if (architecture_ < 7 && has_vfp3_) {
551 architecture_ = 7;
552 }
553
554 // ARMv7 implies Thumb2.
555 if (architecture_ >= 7) {
556 has_thumb2_ = true;
557 }
558
559 // The earliest architecture with Thumb2 is ARMv6T2.
560 if (has_thumb2_ && architecture_ < 6) {
561 architecture_ = 6;
562 }
563
564 // We don't support any FPUs other than VFP.
565 has_fpu_ = has_vfp_;
566
567 #elif V8_OS_QNX
568
569 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags;
570 if (cpu_flags & ARM_CPU_FLAG_V7) {
571 architecture_ = 7;
572 has_thumb2_ = true;
573 } else if (cpu_flags & ARM_CPU_FLAG_V6) {
574 architecture_ = 6;
575 // QNX doesn't say if Thumb2 is available.
576 // Assume false for the architectures older than ARMv7.
577 }
578 DCHECK(architecture_ >= 6);
579 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0;
580 has_vfp_ = has_fpu_;
581 if (cpu_flags & ARM_CPU_FLAG_NEON) {
582 has_neon_ = true;
583 has_vfp3_ = has_vfp_;
584 #ifdef ARM_CPU_FLAG_VFP_D32
585 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0;
586 #endif
587 }
588 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0;
589
590 #endif // V8_OS_LINUX
591
592 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
593
594 // Simple detection of FPU at runtime for Linux.
595 // It is based on /proc/cpuinfo, which reveals hardware configuration
596 // to user-space applications. According to MIPS (early 2010), no similar
597 // facility is universally available on the MIPS architectures,
598 // so it's up to individual OSes to provide such.
599 CPUInfo cpu_info;
600 char* cpu_model = cpu_info.ExtractField("cpu model");
601 has_fpu_ = HasListItem(cpu_model, "FPU");
602 delete[] cpu_model;
603 #ifdef V8_HOST_ARCH_MIPS
604 is_fp64_mode_ = __detect_fp64_mode();
605 architecture_ = __detect_mips_arch_revision();
606 #endif
607
608 #elif V8_HOST_ARCH_ARM64
609
610 CPUInfo cpu_info;
611
612 // Extract implementor from the "CPU implementer" field.
613 char* implementer = cpu_info.ExtractField("CPU implementer");
614 if (implementer != NULL) {
615 char* end;
616 implementer_ = strtol(implementer, &end, 0);
617 if (end == implementer) {
618 implementer_ = 0;
619 }
620 delete[] implementer;
621 }
622
623 char* variant = cpu_info.ExtractField("CPU variant");
624 if (variant != NULL) {
625 char* end;
626 variant_ = strtol(variant, &end, 0);
627 if (end == variant) {
628 variant_ = -1;
629 }
630 delete[] variant;
631 }
632
633 // Extract part number from the "CPU part" field.
634 char* part = cpu_info.ExtractField("CPU part");
635 if (part != NULL) {
636 char* end;
637 part_ = strtol(part, &end, 0);
638 if (end == part) {
639 part_ = 0;
640 }
641 delete[] part;
642 }
643
644 #elif V8_HOST_ARCH_PPC
645
646 #ifndef USE_SIMULATOR
647 #if V8_OS_LINUX
648 // Read processor info from /proc/self/auxv.
649 char* auxv_cpu_type = NULL;
650 FILE* fp = fopen("/proc/self/auxv", "r");
651 if (fp != NULL) {
652 #if V8_TARGET_ARCH_PPC64
653 Elf64_auxv_t entry;
654 #else
655 Elf32_auxv_t entry;
656 #endif
657 for (;;) {
658 size_t n = fread(&entry, sizeof(entry), 1, fp);
659 if (n == 0 || entry.a_type == AT_NULL) {
660 break;
661 }
662 switch (entry.a_type) {
663 case AT_PLATFORM:
664 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val);
665 break;
666 case AT_ICACHEBSIZE:
667 icache_line_size_ = entry.a_un.a_val;
668 break;
669 case AT_DCACHEBSIZE:
670 dcache_line_size_ = entry.a_un.a_val;
671 break;
672 }
673 }
674 fclose(fp);
675 }
676
677 part_ = -1;
678 if (auxv_cpu_type) {
679 if (strcmp(auxv_cpu_type, "power8") == 0) {
680 part_ = PPC_POWER8;
681 } else if (strcmp(auxv_cpu_type, "power7") == 0) {
682 part_ = PPC_POWER7;
683 } else if (strcmp(auxv_cpu_type, "power6") == 0) {
684 part_ = PPC_POWER6;
685 } else if (strcmp(auxv_cpu_type, "power5") == 0) {
686 part_ = PPC_POWER5;
687 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) {
688 part_ = PPC_G5;
689 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) {
690 part_ = PPC_G4;
691 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) {
692 part_ = PPC_PA6T;
693 }
694 }
695
696 #elif V8_OS_AIX
697 switch (_system_configuration.implementation) {
698 case POWER_8:
699 part_ = PPC_POWER8;
700 break;
701 case POWER_7:
702 part_ = PPC_POWER7;
703 break;
704 case POWER_6:
705 part_ = PPC_POWER6;
706 break;
707 case POWER_5:
708 part_ = PPC_POWER5;
709 break;
710 }
711 #endif // V8_OS_AIX
712 #endif // !USE_SIMULATOR
713 #endif // V8_HOST_ARCH_PPC
714 }
715
716 } // namespace base
717 } // namespace v8
718