• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #if V8_TARGET_ARCH_ARM
6 
7 #include "src/codegen.h"
8 #include "src/ic/ic.h"
9 #include "src/ic/stub-cache.h"
10 #include "src/interface-descriptors.h"
11 
12 namespace v8 {
13 namespace internal {
14 
15 #define __ ACCESS_MASM(masm)
16 
ProbeTable(Isolate * isolate,MacroAssembler * masm,Code::Flags flags,StubCache::Table table,Register receiver,Register name,Register offset,Register scratch,Register scratch2,Register offset_scratch)17 static void ProbeTable(Isolate* isolate, MacroAssembler* masm,
18                        Code::Flags flags, StubCache::Table table,
19                        Register receiver, Register name,
20                        // Number of the cache entry, not scaled.
21                        Register offset, Register scratch, Register scratch2,
22                        Register offset_scratch) {
23   ExternalReference key_offset(isolate->stub_cache()->key_reference(table));
24   ExternalReference value_offset(isolate->stub_cache()->value_reference(table));
25   ExternalReference map_offset(isolate->stub_cache()->map_reference(table));
26 
27   uint32_t key_off_addr = reinterpret_cast<uint32_t>(key_offset.address());
28   uint32_t value_off_addr = reinterpret_cast<uint32_t>(value_offset.address());
29   uint32_t map_off_addr = reinterpret_cast<uint32_t>(map_offset.address());
30 
31   // Check the relative positions of the address fields.
32   DCHECK(value_off_addr > key_off_addr);
33   DCHECK((value_off_addr - key_off_addr) % 4 == 0);
34   DCHECK((value_off_addr - key_off_addr) < (256 * 4));
35   DCHECK(map_off_addr > key_off_addr);
36   DCHECK((map_off_addr - key_off_addr) % 4 == 0);
37   DCHECK((map_off_addr - key_off_addr) < (256 * 4));
38 
39   Label miss;
40   Register base_addr = scratch;
41   scratch = no_reg;
42 
43   // Multiply by 3 because there are 3 fields per entry (name, code, map).
44   __ add(offset_scratch, offset, Operand(offset, LSL, 1));
45 
46   // Calculate the base address of the entry.
47   __ mov(base_addr, Operand(key_offset));
48   __ add(base_addr, base_addr, Operand(offset_scratch, LSL, kPointerSizeLog2));
49 
50   // Check that the key in the entry matches the name.
51   __ ldr(ip, MemOperand(base_addr, 0));
52   __ cmp(name, ip);
53   __ b(ne, &miss);
54 
55   // Check the map matches.
56   __ ldr(ip, MemOperand(base_addr, map_off_addr - key_off_addr));
57   __ ldr(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset));
58   __ cmp(ip, scratch2);
59   __ b(ne, &miss);
60 
61   // Get the code entry from the cache.
62   Register code = scratch2;
63   scratch2 = no_reg;
64   __ ldr(code, MemOperand(base_addr, value_off_addr - key_off_addr));
65 
66   // Check that the flags match what we're looking for.
67   Register flags_reg = base_addr;
68   base_addr = no_reg;
69   __ ldr(flags_reg, FieldMemOperand(code, Code::kFlagsOffset));
70   // It's a nice optimization if this constant is encodable in the bic insn.
71 
72   uint32_t mask = Code::kFlagsNotUsedInLookup;
73   DCHECK(__ ImmediateFitsAddrMode1Instruction(mask));
74   __ bic(flags_reg, flags_reg, Operand(mask));
75   __ cmp(flags_reg, Operand(flags));
76   __ b(ne, &miss);
77 
78 #ifdef DEBUG
79   if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) {
80     __ jmp(&miss);
81   } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
82     __ jmp(&miss);
83   }
84 #endif
85 
86   // Jump to the first instruction in the code stub.
87   __ add(pc, code, Operand(Code::kHeaderSize - kHeapObjectTag));
88 
89   // Miss: fall through.
90   __ bind(&miss);
91 }
92 
93 
GenerateProbe(MacroAssembler * masm,Code::Kind ic_kind,Code::Flags flags,Register receiver,Register name,Register scratch,Register extra,Register extra2,Register extra3)94 void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind,
95                               Code::Flags flags, Register receiver,
96                               Register name, Register scratch, Register extra,
97                               Register extra2, Register extra3) {
98   Isolate* isolate = masm->isolate();
99   Label miss;
100 
101   // Make sure that code is valid. The multiplying code relies on the
102   // entry size being 12.
103   DCHECK(sizeof(Entry) == 12);
104 
105   // Make sure that there are no register conflicts.
106   DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3));
107 
108   // Check scratch, extra and extra2 registers are valid.
109   DCHECK(!scratch.is(no_reg));
110   DCHECK(!extra.is(no_reg));
111   DCHECK(!extra2.is(no_reg));
112   DCHECK(!extra3.is(no_reg));
113 
114 #ifdef DEBUG
115   // If vector-based ics are in use, ensure that scratch, extra, extra2 and
116   // extra3 don't conflict with the vector and slot registers, which need
117   // to be preserved for a handler call or miss.
118   if (IC::ICUseVector(ic_kind)) {
119     Register vector, slot;
120     if (ic_kind == Code::STORE_IC || ic_kind == Code::KEYED_STORE_IC) {
121       vector = VectorStoreICDescriptor::VectorRegister();
122       slot = VectorStoreICDescriptor::SlotRegister();
123     } else {
124       vector = LoadWithVectorDescriptor::VectorRegister();
125       slot = LoadWithVectorDescriptor::SlotRegister();
126     }
127     DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
128   }
129 #endif
130 
131   Counters* counters = masm->isolate()->counters();
132   __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2,
133                       extra3);
134 
135   // Check that the receiver isn't a smi.
136   __ JumpIfSmi(receiver, &miss);
137 
138   // Get the map of the receiver and compute the hash.
139   __ ldr(scratch, FieldMemOperand(name, Name::kHashFieldOffset));
140   __ ldr(ip, FieldMemOperand(receiver, HeapObject::kMapOffset));
141   __ add(scratch, scratch, Operand(ip));
142   uint32_t mask = kPrimaryTableSize - 1;
143   // We shift out the last two bits because they are not part of the hash and
144   // they are always 01 for maps.
145   __ mov(scratch, Operand(scratch, LSR, kCacheIndexShift));
146   // Mask down the eor argument to the minimum to keep the immediate
147   // ARM-encodable.
148   __ eor(scratch, scratch, Operand((flags >> kCacheIndexShift) & mask));
149   // Prefer and_ to ubfx here because ubfx takes 2 cycles.
150   __ and_(scratch, scratch, Operand(mask));
151 
152   // Probe the primary table.
153   ProbeTable(isolate, masm, flags, kPrimary, receiver, name, scratch, extra,
154              extra2, extra3);
155 
156   // Primary miss: Compute hash for secondary probe.
157   __ sub(scratch, scratch, Operand(name, LSR, kCacheIndexShift));
158   uint32_t mask2 = kSecondaryTableSize - 1;
159   __ add(scratch, scratch, Operand((flags >> kCacheIndexShift) & mask2));
160   __ and_(scratch, scratch, Operand(mask2));
161 
162   // Probe the secondary table.
163   ProbeTable(isolate, masm, flags, kSecondary, receiver, name, scratch, extra,
164              extra2, extra3);
165 
166   // Cache miss: Fall-through and let caller handle the miss by
167   // entering the runtime system.
168   __ bind(&miss);
169   __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2,
170                       extra3);
171 }
172 
173 
174 #undef __
175 }  // namespace internal
176 }  // namespace v8
177 
178 #endif  // V8_TARGET_ARCH_ARM
179