1static constexpr uint8_t expected_asm_kThumb2[] = { 2 0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x0B, 0xB0, 3 0xBD, 0xEC, 0x02, 0x8A, 0x60, 0xBD, 4}; 5static constexpr uint8_t expected_cfi_kThumb2[] = { 6 0x42, 0x0E, 0x0C, 0x85, 0x03, 0x86, 0x02, 0x8E, 0x01, 0x44, 0x0E, 0x14, 7 0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x0A, 0x42, 8 0x0E, 0x14, 0x44, 0x0E, 0x0C, 0x06, 0x50, 0x06, 0x51, 0x42, 0x0B, 0x0E, 9 0x40, 10}; 11// 0x00000000: push {r5, r6, lr} 12// 0x00000002: .cfi_def_cfa_offset: 12 13// 0x00000002: .cfi_offset: r5 at cfa-12 14// 0x00000002: .cfi_offset: r6 at cfa-8 15// 0x00000002: .cfi_offset: r14 at cfa-4 16// 0x00000002: vpush.f32 {s16-s17} 17// 0x00000006: .cfi_def_cfa_offset: 20 18// 0x00000006: .cfi_offset_extended: r80 at cfa-20 19// 0x00000006: .cfi_offset_extended: r81 at cfa-16 20// 0x00000006: sub sp, sp, #44 21// 0x00000008: .cfi_def_cfa_offset: 64 22// 0x00000008: .cfi_remember_state 23// 0x00000008: add sp, sp, #44 24// 0x0000000a: .cfi_def_cfa_offset: 20 25// 0x0000000a: vpop.f32 {s16-s17} 26// 0x0000000e: .cfi_def_cfa_offset: 12 27// 0x0000000e: .cfi_restore_extended: r80 28// 0x0000000e: .cfi_restore_extended: r81 29// 0x0000000e: pop {r5, r6, pc} 30// 0x00000010: .cfi_restore_state 31// 0x00000010: .cfi_def_cfa_offset: 64 32 33static constexpr uint8_t expected_asm_kArm64[] = { 34 0xFF, 0x03, 0x01, 0xD1, 0xF4, 0x17, 0x00, 0xF9, 0xF5, 0x7B, 0x03, 0xA9, 35 0xE8, 0xA7, 0x01, 0x6D, 0xE8, 0xA7, 0x41, 0x6D, 0xF4, 0x17, 0x40, 0xF9, 36 0xF5, 0x7B, 0x43, 0xA9, 0xFF, 0x03, 0x01, 0x91, 0xC0, 0x03, 0x5F, 0xD6, 37}; 38static constexpr uint8_t expected_cfi_kArm64[] = { 39 0x44, 0x0E, 0x40, 0x44, 0x94, 0x06, 0x44, 0x95, 0x04, 0x9E, 0x02, 0x44, 40 0x05, 0x48, 0x0A, 0x05, 0x49, 0x08, 0x0A, 0x44, 0x06, 0x48, 0x06, 0x49, 41 0x44, 0xD4, 0x44, 0xD5, 0xDE, 0x44, 0x0E, 0x00, 0x44, 0x0B, 0x0E, 0x40, 42}; 43// 0x00000000: sub sp, sp, #0x40 (64) 44// 0x00000004: .cfi_def_cfa_offset: 64 45// 0x00000004: str x20, [sp, #40] 46// 0x00000008: .cfi_offset: r20 at cfa-24 47// 0x00000008: stp x21, lr, [sp, #48] 48// 0x0000000c: .cfi_offset: r21 at cfa-16 49// 0x0000000c: .cfi_offset: r30 at cfa-8 50// 0x0000000c: stp d8, d9, [sp, #24] 51// 0x00000010: .cfi_offset_extended: r72 at cfa-40 52// 0x00000010: .cfi_offset_extended: r73 at cfa-32 53// 0x00000010: .cfi_remember_state 54// 0x00000010: ldp d8, d9, [sp, #24] 55// 0x00000014: .cfi_restore_extended: r72 56// 0x00000014: .cfi_restore_extended: r73 57// 0x00000014: ldr x20, [sp, #40] 58// 0x00000018: .cfi_restore: r20 59// 0x00000018: ldp x21, lr, [sp, #48] 60// 0x0000001c: .cfi_restore: r21 61// 0x0000001c: .cfi_restore: r30 62// 0x0000001c: add sp, sp, #0x40 (64) 63// 0x00000020: .cfi_def_cfa_offset: 0 64// 0x00000020: ret 65// 0x00000024: .cfi_restore_state 66// 0x00000024: .cfi_def_cfa_offset: 64 67 68static constexpr uint8_t expected_asm_kX86[] = { 69 0x56, 0x55, 0x83, 0xEC, 0x34, 0x83, 0xC4, 0x34, 0x5D, 70 0x5E, 0xC3, 71}; 72static constexpr uint8_t expected_cfi_kX86[] = { 73 0x41, 0x0E, 0x08, 0x86, 0x02, 0x41, 0x0E, 0x0C, 0x85, 0x03, 0x43, 0x0E, 74 0x40, 0x0A, 0x43, 0x0E, 0x0C, 0x41, 0x0E, 0x08, 0xC5, 0x41, 0x0E, 75 0x04, 0xC6, 0x41, 0x0B, 0x0E, 0x40, 76}; 77// 0x00000000: push esi 78// 0x00000001: .cfi_def_cfa_offset: 8 79// 0x00000001: .cfi_offset: r6 at cfa-8 80// 0x00000001: push ebp 81// 0x00000002: .cfi_def_cfa_offset: 12 82// 0x00000002: .cfi_offset: r5 at cfa-12 83// 0x00000002: sub esp, 52 84// 0x00000005: .cfi_def_cfa_offset: 64 85// 0x00000005: .cfi_remember_state 86// 0x00000005: add esp, 52 87// 0x00000008: .cfi_def_cfa_offset: 12 88// 0x00000008: pop ebp 89// 0x0000000a: .cfi_def_cfa_offset: 8 90// 0x0000000a: .cfi_restore: r5 91// 0x0000000a: pop esi 92// 0x0000000b: .cfi_def_cfa_offset: 4 93// 0x0000000b: .cfi_restore: r6 94// 0x0000000b: ret 95// 0x0000000c: .cfi_restore_state 96// 0x0000000c: .cfi_def_cfa_offset: 64 97 98static constexpr uint8_t expected_asm_kX86_64[] = { 99 0x55, 0x53, 0x48, 0x83, 0xEC, 0x28, 0xF2, 0x44, 0x0F, 0x11, 0x6C, 0x24, 100 0x20, 0xF2, 0x44, 0x0F, 0x11, 0x64, 0x24, 0x18, 101 0xF2, 0x44, 0x0F, 0x10, 0x64, 0x24, 0x18, 0xF2, 0x44, 0x0F, 0x10, 0x6C, 102 0x24, 0x20, 0x48, 0x83, 0xC4, 0x28, 0x5B, 0x5D, 0xC3, 103}; 104static constexpr uint8_t expected_cfi_kX86_64[] = { 105 0x41, 0x0E, 0x10, 0x86, 0x04, 0x41, 0x0E, 0x18, 0x83, 0x06, 0x44, 0x0E, 106 0x40, 0x47, 0x9E, 0x08, 0x47, 0x9D, 0x0A, 0x0A, 0x47, 0xDD, 0x47, 107 0xDE, 0x44, 0x0E, 0x18, 0x41, 0x0E, 0x10, 0xC3, 0x41, 0x0E, 0x08, 0xC6, 108 0x41, 0x0B, 0x0E, 0x40, 109}; 110// 0x00000000: push rbp 111// 0x00000001: .cfi_def_cfa_offset: 16 112// 0x00000001: .cfi_offset: r6 at cfa-16 113// 0x00000001: push rbx 114// 0x00000002: .cfi_def_cfa_offset: 24 115// 0x00000002: .cfi_offset: r3 at cfa-24 116// 0x00000002: subq rsp, 40 117// 0x00000006: .cfi_def_cfa_offset: 64 118// 0x00000006: movsd [rsp + 32], xmm13 119// 0x0000000d: .cfi_offset: r30 at cfa-32 120// 0x0000000d: movsd [rsp + 24], xmm12 121// 0x00000014: .cfi_offset: r29 at cfa-40 122// 0x00000014: .cfi_remember_state 123// 0x00000014: movsd xmm12, [rsp + 24] 124// 0x0000001c: .cfi_restore: r29 125// 0x0000001c: movsd xmm13, [rsp + 32] 126// 0x00000022: .cfi_restore: r30 127// 0x00000022: addq rsp, 40 128// 0x00000026: .cfi_def_cfa_offset: 24 129// 0x00000026: pop rbx 130// 0x00000027: .cfi_def_cfa_offset: 16 131// 0x00000027: .cfi_restore: r3 132// 0x00000027: pop rbp 133// 0x00000028: .cfi_def_cfa_offset: 8 134// 0x00000028: .cfi_restore: r6 135// 0x00000028: ret 136// 0x00000029: .cfi_restore_state 137// 0x00000029: .cfi_def_cfa_offset: 64 138 139static constexpr uint8_t expected_asm_kMips[] = { 140 0xC0, 0xFF, 0xBD, 0x27, 0x3C, 0x00, 0xBF, 0xAF, 0x38, 0x00, 0xB1, 0xAF, 141 0x34, 0x00, 0xB0, 0xAF, 0x28, 0x00, 0xB6, 0xF7, 0x20, 0x00, 0xB4, 0xF7, 142 0x3C, 0x00, 0xBF, 0x8F, 0x38, 0x00, 0xB1, 0x8F, 143 0x34, 0x00, 0xB0, 0x8F, 0x28, 0x00, 0xB6, 0xD7, 0x20, 0x00, 0xB4, 0xD7, 144 0x09, 0x00, 0xE0, 0x03, 0x40, 0x00, 0xBD, 0x27, 145}; 146static constexpr uint8_t expected_cfi_kMips[] = { 147 0x44, 0x0E, 0x40, 0x44, 0x9F, 0x01, 0x44, 0x91, 0x02, 0x44, 0x90, 0x03, 148 0x48, 0x0A, 0x44, 0xDF, 0x44, 0xD1, 0x44, 0xD0, 0x50, 0x0E, 0x00, 0x0B, 149 0x0E, 0x40, 150}; 151// 0x00000000: addiu r29, r29, -64 152// 0x00000004: .cfi_def_cfa_offset: 64 153// 0x00000004: sw r31, +60(r29) 154// 0x00000008: .cfi_offset: r31 at cfa-4 155// 0x00000008: sw r17, +56(r29) 156// 0x0000000c: .cfi_offset: r17 at cfa-8 157// 0x0000000c: sw r16, +52(r29) 158// 0x00000010: .cfi_offset: r16 at cfa-12 159// 0x00000010: sdc1 f22, +40(r29) 160// 0x00000014: sdc1 f20, +32(r29) 161// 0x00000018: .cfi_remember_state 162// 0x00000018: lw r31, +60(r29) 163// 0x0000001c: .cfi_restore: r31 164// 0x0000001c: lw r17, +56(r29) 165// 0x00000020: .cfi_restore: r17 166// 0x00000020: lw r16, +52(r29) 167// 0x00000024: .cfi_restore: r16 168// 0x00000024: ldc1 f22, +40(r29) 169// 0x00000028: ldc1 f20, +32(r29) 170// 0x0000002c: jr r31 171// 0x00000030: addiu r29, r29, 64 172// 0x00000034: .cfi_def_cfa_offset: 0 173// 0x00000034: .cfi_restore_state 174// 0x00000034: .cfi_def_cfa_offset: 64 175 176static constexpr uint8_t expected_asm_kMips64[] = { 177 0xC0, 0xFF, 0xBD, 0x67, 0x38, 0x00, 0xBF, 0xFF, 0x30, 0x00, 0xB1, 0xFF, 178 0x28, 0x00, 0xB0, 0xFF, 0x20, 0x00, 0xB9, 0xF7, 0x18, 0x00, 0xB8, 0xF7, 179 0x38, 0x00, 0xBF, 0xDF, 0x30, 0x00, 0xB1, 0xDF, 0x28, 0x00, 0xB0, 0xDF, 180 0x20, 0x00, 0xB9, 0xD7, 0x18, 0x00, 0xB8, 0xD7, 0x40, 0x00, 0xBD, 0x67, 181 0x00, 0x00, 0x1F, 0xD8, 182}; 183static constexpr uint8_t expected_cfi_kMips64[] = { 184 0x44, 0x0E, 0x40, 0x44, 0x9F, 0x02, 0x44, 0x91, 0x04, 0x44, 0x90, 0x06, 185 0x44, 0xB9, 0x08, 0x44, 0xB8, 0x0A, 0x0A, 0x44, 0xDF, 0x44, 0xD1, 0x44, 186 0xD0, 0x44, 0xF9, 0x44, 0xF8, 0x44, 0x0E, 0x00, 0x44, 0x0B, 0x0E, 0x40, 187}; 188// 0x00000000: daddiu r29, r29, -64 189// 0x00000004: .cfi_def_cfa_offset: 64 190// 0x00000004: sd r31, +56(r29) 191// 0x00000008: .cfi_offset: r31 at cfa-8 192// 0x00000008: sd r17, +48(r29) 193// 0x0000000c: .cfi_offset: r17 at cfa-16 194// 0x0000000c: sd r16, +40(r29) 195// 0x00000010: .cfi_offset: r16 at cfa-24 196// 0x00000010: sdc1 f25, +32(r29) 197// 0x00000014: .cfi_offset: r57 at cfa-32 198// 0x00000014: sdc1 f24, +24(r29) 199// 0x00000018: .cfi_offset: r56 at cfa-40 200// 0x00000018: .cfi_remember_state 201// 0x00000018: ld r31, +56(r29) 202// 0x0000001c: .cfi_restore: r31 203// 0x0000001c: ld r17, +48(r29) 204// 0x00000020: .cfi_restore: r17 205// 0x00000020: ld r16, +40(r29) 206// 0x00000024: .cfi_restore: r16 207// 0x00000024: ldc1 f25, +32(r29) 208// 0x00000028: .cfi_restore: r57 209// 0x00000028: ldc1 f24, +24(r29) 210// 0x0000002c: .cfi_restore: r56 211// 0x0000002c: daddiu r29, r29, 64 212// 0x00000030: .cfi_def_cfa_offset: 0 213// 0x00000030: jic r31, 0 214// 0x00000034: .cfi_restore_state 215// 0x00000034: .cfi_def_cfa_offset: 64 216 217static constexpr uint8_t expected_asm_kThumb2_adjust[] = { 218#ifdef ART_USE_OLD_ARM_BACKEND 219 0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x00, 0x28, 220 0x40, 0xD0, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 221#else 222 // VIXL emits an extra 2 bytes here for a 32-bit beq as there is no 223 // optimistic 16-bit emit and subsequent fixup for out of reach targets 224 // as with the old assembler. 225 0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x00, 0x28, 0x00, 0xF0, 226 0x41, 0x80, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 227#endif 228 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 229 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 230 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 231 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 232 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 233 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 234 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 235 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 236 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 237 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 238 0x0B, 0xB0, 0xBD, 0xEC, 0x02, 0x8A, 0x60, 0xBD, 239}; 240static constexpr uint8_t expected_cfi_kThumb2_adjust[] = { 241 0x42, 0x0E, 0x0C, 0x85, 0x03, 0x86, 0x02, 0x8E, 0x01, 0x44, 0x0E, 0x14, 242#ifdef ART_USE_OLD_ARM_BACKEND 243 0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x02, 0x86, 0x0A, 244#else 245 0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x02, 0x88, 0x0A, 246#endif 247 0x42, 0x0E, 0x14, 0x44, 0x0E, 0x0C, 0x06, 0x50, 0x06, 0x51, 0x42, 0x0B, 248 0x0E, 0x40, 249}; 250// 0x00000000: push {r5, r6, lr} 251// 0x00000002: .cfi_def_cfa_offset: 12 252// 0x00000002: .cfi_offset: r5 at cfa-12 253// 0x00000002: .cfi_offset: r6 at cfa-8 254// 0x00000002: .cfi_offset: r14 at cfa-4 255// 0x00000002: vpush.f32 {s16-s17} 256// 0x00000006: .cfi_def_cfa_offset: 20 257// 0x00000006: .cfi_offset_extended: r80 at cfa-20 258// 0x00000006: .cfi_offset_extended: r81 at cfa-16 259// 0x00000006: sub sp, sp, #44 260// 0x00000008: .cfi_def_cfa_offset: 64 261// 0x00000008: cmp r0, #0 262// 0x0000000a: beq +128 (0x00000090) 263// 0x0000000c: ldr r0, [r0, #0] 264// 0x0000000e: ldr r0, [r0, #0] 265// 0x00000010: ldr r0, [r0, #0] 266// 0x00000012: ldr r0, [r0, #0] 267// 0x00000014: ldr r0, [r0, #0] 268// 0x00000016: ldr r0, [r0, #0] 269// 0x00000018: ldr r0, [r0, #0] 270// 0x0000001a: ldr r0, [r0, #0] 271// 0x0000001c: ldr r0, [r0, #0] 272// 0x0000001e: ldr r0, [r0, #0] 273// 0x00000020: ldr r0, [r0, #0] 274// 0x00000022: ldr r0, [r0, #0] 275// 0x00000024: ldr r0, [r0, #0] 276// 0x00000026: ldr r0, [r0, #0] 277// 0x00000028: ldr r0, [r0, #0] 278// 0x0000002a: ldr r0, [r0, #0] 279// 0x0000002c: ldr r0, [r0, #0] 280// 0x0000002e: ldr r0, [r0, #0] 281// 0x00000030: ldr r0, [r0, #0] 282// 0x00000032: ldr r0, [r0, #0] 283// 0x00000034: ldr r0, [r0, #0] 284// 0x00000036: ldr r0, [r0, #0] 285// 0x00000038: ldr r0, [r0, #0] 286// 0x0000003a: ldr r0, [r0, #0] 287// 0x0000003c: ldr r0, [r0, #0] 288// 0x0000003e: ldr r0, [r0, #0] 289// 0x00000040: ldr r0, [r0, #0] 290// 0x00000042: ldr r0, [r0, #0] 291// 0x00000044: ldr r0, [r0, #0] 292// 0x00000046: ldr r0, [r0, #0] 293// 0x00000048: ldr r0, [r0, #0] 294// 0x0000004a: ldr r0, [r0, #0] 295// 0x0000004c: ldr r0, [r0, #0] 296// 0x0000004e: ldr r0, [r0, #0] 297// 0x00000050: ldr r0, [r0, #0] 298// 0x00000052: ldr r0, [r0, #0] 299// 0x00000054: ldr r0, [r0, #0] 300// 0x00000056: ldr r0, [r0, #0] 301// 0x00000058: ldr r0, [r0, #0] 302// 0x0000005a: ldr r0, [r0, #0] 303// 0x0000005c: ldr r0, [r0, #0] 304// 0x0000005e: ldr r0, [r0, #0] 305// 0x00000060: ldr r0, [r0, #0] 306// 0x00000062: ldr r0, [r0, #0] 307// 0x00000064: ldr r0, [r0, #0] 308// 0x00000066: ldr r0, [r0, #0] 309// 0x00000068: ldr r0, [r0, #0] 310// 0x0000006a: ldr r0, [r0, #0] 311// 0x0000006c: ldr r0, [r0, #0] 312// 0x0000006e: ldr r0, [r0, #0] 313// 0x00000070: ldr r0, [r0, #0] 314// 0x00000072: ldr r0, [r0, #0] 315// 0x00000074: ldr r0, [r0, #0] 316// 0x00000076: ldr r0, [r0, #0] 317// 0x00000078: ldr r0, [r0, #0] 318// 0x0000007a: ldr r0, [r0, #0] 319// 0x0000007c: ldr r0, [r0, #0] 320// 0x0000007e: ldr r0, [r0, #0] 321// 0x00000080: ldr r0, [r0, #0] 322// 0x00000082: ldr r0, [r0, #0] 323// 0x00000084: ldr r0, [r0, #0] 324// 0x00000086: ldr r0, [r0, #0] 325// 0x00000088: ldr r0, [r0, #0] 326// 0x0000008a: ldr r0, [r0, #0] 327// 0x0000008c: ldr r0, [r0, #0] 328// 0x0000008e: .cfi_remember_state 329// 0x0000008e: add sp, sp, #44 330// 0x00000090: .cfi_def_cfa_offset: 20 331// 0x00000090: vpop.f32 {s16-s17} 332// 0x00000094: .cfi_def_cfa_offset: 12 333// 0x00000094: .cfi_restore_extended: r80 334// 0x00000094: .cfi_restore_extended: r81 335// 0x00000094: pop {r5, r6, pc} 336// 0x00000096: .cfi_restore_state 337// 0x00000096: .cfi_def_cfa_offset: 64 338 339static constexpr uint8_t expected_asm_kMips_adjust_head[] = { 340 0xC0, 0xFF, 0xBD, 0x27, 0x3C, 0x00, 0xBF, 0xAF, 0x38, 0x00, 0xB1, 0xAF, 341 0x34, 0x00, 0xB0, 0xAF, 0x28, 0x00, 0xB6, 0xF7, 0x20, 0x00, 0xB4, 0xF7, 342 0x08, 0x00, 0x04, 0x14, 0xFC, 0xFF, 0xBD, 0x27, 343 0x00, 0x00, 0xBF, 0xAF, 0x00, 0x00, 0x10, 0x04, 0x02, 0x00, 0x01, 0x3C, 344 0x18, 0x00, 0x21, 0x34, 0x21, 0x08, 0x3F, 0x00, 0x00, 0x00, 0xBF, 0x8F, 345 0x09, 0x00, 0x20, 0x00, 0x04, 0x00, 0xBD, 0x27, 346}; 347static constexpr uint8_t expected_asm_kMips_adjust_tail[] = { 348 0x3C, 0x00, 0xBF, 0x8F, 0x38, 0x00, 0xB1, 0x8F, 0x34, 0x00, 0xB0, 0x8F, 349 0x28, 0x00, 0xB6, 0xD7, 0x20, 0x00, 0xB4, 0xD7, 0x09, 0x00, 0xE0, 0x03, 350 0x40, 0x00, 0xBD, 0x27, 351}; 352static constexpr uint8_t expected_cfi_kMips_adjust[] = { 353 0x44, 0x0E, 0x40, 0x44, 0x9F, 0x01, 0x44, 0x91, 0x02, 0x44, 0x90, 0x03, 354 0x50, 0x0E, 0x44, 0x60, 0x0E, 0x40, 0x04, 0x04, 0x00, 0x02, 0x00, 0x0A, 355 0x44, 0xDF, 0x44, 0xD1, 0x44, 0xD0, 0x50, 0x0E, 0x00, 0x0B, 0x0E, 0x40, 356}; 357// 0x00000000: addiu r29, r29, -64 358// 0x00000004: .cfi_def_cfa_offset: 64 359// 0x00000004: sw r31, +60(r29) 360// 0x00000008: .cfi_offset: r31 at cfa-4 361// 0x00000008: sw r17, +56(r29) 362// 0x0000000c: .cfi_offset: r17 at cfa-8 363// 0x0000000c: sw r16, +52(r29) 364// 0x00000010: .cfi_offset: r16 at cfa-12 365// 0x00000010: sdc1 f22, +40(r29) 366// 0x00000014: sdc1 f20, +32(r29) 367// 0x00000018: bne r0, r4, 0x00000040 ; +36 368// 0x0000001c: addiu r29, r29, -4 369// 0x00000020: .cfi_def_cfa_offset: 68 370// 0x00000020: sw r31, +0(r29) 371// 0x00000024: bltzal r0, 0x0000002c ; +4 372// 0x00000028: lui r1, 0x20000 373// 0x0000002c: ori r1, r1, 24 374// 0x00000030: addu r1, r1, r31 375// 0x00000034: lw r31, +0(r29) 376// 0x00000038: jr r1 377// 0x0000003c: addiu r29, r29, 4 378// 0x00000040: .cfi_def_cfa_offset: 64 379// 0x00000040: nop 380// ... 381// 0x00020040: nop 382// 0x00020044: .cfi_remember_state 383// 0x00020044: lw r31, +60(r29) 384// 0x00020048: .cfi_restore: r31 385// 0x00020048: lw r17, +56(r29) 386// 0x0002004c: .cfi_restore: r17 387// 0x0002004c: lw r16, +52(r29) 388// 0x00020050: .cfi_restore: r16 389// 0x00020050: ldc1 f22, +40(r29) 390// 0x00020054: ldc1 f20, +32(r29) 391// 0x00020058: jr r31 392// 0x0002005c: addiu r29, r29, 64 393// 0x00020060: .cfi_def_cfa_offset: 0 394// 0x00020060: .cfi_restore_state 395// 0x00020060: .cfi_def_cfa_offset: 64 396 397static constexpr uint8_t expected_asm_kMips64_adjust_head[] = { 398 0xC0, 0xFF, 0xBD, 0x67, 0x38, 0x00, 0xBF, 0xFF, 0x30, 0x00, 0xB1, 0xFF, 399 0x28, 0x00, 0xB0, 0xFF, 0x20, 0x00, 0xB9, 0xF7, 0x18, 0x00, 0xB8, 0xF7, 400 0x02, 0x00, 0xA6, 0x60, 0x02, 0x00, 0x3E, 0xEC, 0x0C, 0x00, 0x01, 0xD8, 401}; 402static constexpr uint8_t expected_asm_kMips64_adjust_tail[] = { 403 0x38, 0x00, 0xBF, 0xDF, 0x30, 0x00, 0xB1, 0xDF, 0x28, 0x00, 0xB0, 0xDF, 404 0x20, 0x00, 0xB9, 0xD7, 0x18, 0x00, 0xB8, 0xD7, 0x40, 0x00, 0xBD, 0x67, 405 0x00, 0x00, 0x1F, 0xD8, 406}; 407static constexpr uint8_t expected_cfi_kMips64_adjust[] = { 408 0x44, 0x0E, 0x40, 0x44, 0x9F, 0x02, 0x44, 0x91, 0x04, 0x44, 0x90, 0x06, 409 0x44, 0xB9, 0x08, 0x44, 0xB8, 0x0A, 0x04, 0x10, 0x00, 0x02, 0x00, 0x0A, 410 0x44, 0xDF, 0x44, 0xD1, 0x44, 0xD0, 0x44, 0xF9, 0x44, 0xF8, 0x44, 0x0E, 411 0x00, 0x44, 0x0B, 0x0E, 0x40, 412}; 413// 0x00000000: daddiu r29, r29, -64 414// 0x00000004: .cfi_def_cfa_offset: 64 415// 0x00000004: sd r31, +56(r29) 416// 0x00000008: .cfi_offset: r31 at cfa-8 417// 0x00000008: sd r17, +48(r29) 418// 0x0000000c: .cfi_offset: r17 at cfa-16 419// 0x0000000c: sd r16, +40(r29) 420// 0x00000010: .cfi_offset: r16 at cfa-24 421// 0x00000010: sdc1 f25, +32(r29) 422// 0x00000014: .cfi_offset: r57 at cfa-32 423// 0x00000014: sdc1 f24, +24(r29) 424// 0x00000018: .cfi_offset: r56 at cfa-40 425// 0x00000018: bnec r5, r6, 0x00000024 ; +12 426// 0x0000001c: auipc r1, 2 427// 0x00000020: jic r1, 12 ; bc 0x00020028 ; +131080 428// 0x00000024: nop 429// ... 430// 0x00020024: nop 431// 0x00020028: .cfi_remember_state 432// 0x00020028: ld r31, +56(r29) 433// 0x0002002c: .cfi_restore: r31 434// 0x0002002c: ld r17, +48(r29) 435// 0x00020030: .cfi_restore: r17 436// 0x00020030: ld r16, +40(r29) 437// 0x00020034: .cfi_restore: r16 438// 0x00020034: ldc1 f25, +32(r29) 439// 0x00020038: .cfi_restore: r57 440// 0x00020038: ldc1 f24, +24(r29) 441// 0x0002003c: .cfi_restore: r56 442// 0x0002003c: daddiu r29, r29, 64 443// 0x00020040: .cfi_def_cfa_offset: 0 444// 0x00020040: jic r31, 0 445// 0x00020044: .cfi_restore_state 446// 0x00020044: .cfi_def_cfa_offset: 64 447