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1 /*
2  * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved.
3  * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * Redistributions of source code must retain the above copyright notice, this
9  * list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * Neither the name of ARM nor the names of its contributors may be used
16  * to endorse or promote products derived from this software without specific
17  * prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <arch_helpers.h>
33 #include <arm_gic.h>
34 #include <assert.h>
35 #include <bl_common.h>
36 #include <debug.h>
37 #include <mmio.h>
38 #include <platform.h>
39 #include <platform_def.h>
40 #include <xlat_tables.h>
41 #include <../hikey_def.h>
42 
43 #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
44 					DEVICE_SIZE,			\
45 					MT_DEVICE | MT_RW | MT_SECURE)
46 
47 #define MAP_NS_DRAM	MAP_REGION_FLAT(DRAM_NS_BASE,			\
48 					DRAM_NS_SIZE,			\
49 					MT_DEVICE | MT_RW | MT_NS)
50 
51 #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE, 		\
52 					TSP_SEC_MEM_SIZE,		\
53 					MT_MEMORY | MT_RW | MT_SECURE)
54 
55 #define MAP_ROM_PARAM	MAP_REGION_FLAT(XG2RAM0_BASE,			\
56 					0x1000,				\
57 					MT_DEVICE | MT_RW | MT_NS)
58 
59 #define MAP_SRAM	MAP_REGION_FLAT(SRAM_BASE,			\
60 					SRAM_SIZE,			\
61 					MT_DEVICE | MT_RW | MT_SECURE)
62 
63 /*
64  * Table of regions for different BL stages to map using the MMU.
65  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
66  * configure_mmu_elx() will give the available subset of that,
67  */
68 #if IMAGE_BL1
69 static const mmap_region_t hikey_mmap[] = {
70 	MAP_DEVICE,
71 	MAP_NS_DRAM,
72 	MAP_ROM_PARAM,
73 	{0}
74 };
75 #endif
76 #if IMAGE_BL2
77 static const mmap_region_t hikey_mmap[] = {
78 	MAP_DEVICE,
79 	MAP_NS_DRAM,
80 	MAP_TSP_MEM,
81 	MAP_SRAM,
82 	{0}
83 };
84 #endif
85 #if IMAGE_BL31
86 static const mmap_region_t hikey_mmap[] = {
87 	MAP_DEVICE,
88 	MAP_NS_DRAM,
89 	MAP_TSP_MEM,
90 	MAP_SRAM,
91 	{0}
92 };
93 #endif
94 #if IMAGE_BL32
95 static const mmap_region_t hikey_mmap[] = {
96 	MAP_DEVICE,
97 	MAP_NS_DRAM,
98 	{0}
99 };
100 #endif
101 
102 /* Array of secure interrupts to be configured by the gic driver */
103 const unsigned int irq_sec_array[] = {
104 	IRQ_SEC_PHY_TIMER,
105 	IRQ_SEC_SGI_0,
106 	IRQ_SEC_SGI_1,
107 	IRQ_SEC_SGI_2,
108 	IRQ_SEC_SGI_3,
109 	IRQ_SEC_SGI_4,
110 	IRQ_SEC_SGI_5,
111 	IRQ_SEC_SGI_6,
112 	IRQ_SEC_SGI_7
113 };
114 
115 const unsigned int num_sec_irqs = sizeof(irq_sec_array) /
116 	sizeof(irq_sec_array[0]);
117 
118 /*******************************************************************************
119  * Macro generating the code for the function setting up the pagetables as per
120  * the platform memory map & initialize the mmu, for the given exception level
121  ******************************************************************************/
122 #define DEFINE_CONFIGURE_MMU_EL(_el)				\
123 	void configure_mmu_el##_el(unsigned long total_base,	\
124 				  unsigned long total_size,	\
125 				  unsigned long ro_start,	\
126 				  unsigned long ro_limit,	\
127 				  unsigned long coh_start,	\
128 				  unsigned long coh_limit)	\
129 	{							\
130 	       mmap_add_region(total_base, total_base,		\
131 			       total_size,			\
132 			       MT_MEMORY | MT_RW | MT_SECURE);	\
133 	       mmap_add_region(ro_start, ro_start,		\
134 			       ro_limit - ro_start,		\
135 			       MT_MEMORY | MT_RO | MT_SECURE);	\
136 	       mmap_add_region(coh_start, coh_start,		\
137 			       coh_limit - coh_start,		\
138 			       MT_DEVICE | MT_RW | MT_SECURE);	\
139 	       mmap_add(hikey_mmap);				\
140 	       init_xlat_tables();				\
141 								\
142 	       enable_mmu_el##_el(0);				\
143 	}
144 
145 /* Define EL1 and EL3 variants of the function initialising the MMU */
146 DEFINE_CONFIGURE_MMU_EL(1)
147 DEFINE_CONFIGURE_MMU_EL(3)
148 
plat_get_ns_image_entrypoint(void)149 unsigned long plat_get_ns_image_entrypoint(void)
150 {
151 	return NS_IMAGE_OFFSET;
152 }
153 
plat_get_syscnt_freq(void)154 uint64_t plat_get_syscnt_freq(void)
155 {
156 	return 1200000;
157 }
158 
plat_gic_init(void)159 void plat_gic_init(void)
160 {
161 	arm_gic_init(GICC_BASE, GICD_BASE, 0, irq_sec_array, num_sec_irqs);
162 }
163