1/* 2 * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved. 3 * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * Neither the name of ARM nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific 17 * prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <arch.h> 33#include <asm_macros.S> 34#include <bl_common.h> 35#include <cortex_a53.h> 36#include <cpu_macros.S> 37#include <platform_def.h> 38#include "../hikey_def.h" 39 40 .globl plat_crash_console_init 41 .globl plat_crash_console_putc 42 .globl plat_report_exception 43 .globl plat_reset_handler 44 .globl platform_get_core_pos 45 .globl platform_mem_init 46 47 /* --------------------------------------------- 48 * int plat_crash_console_init(void) 49 * Function to initialize the crash console 50 * without a C Runtime to print crash report. 51 * Clobber list : x0, x1, x2 52 * --------------------------------------------- 53 */ 54func plat_crash_console_init 55 mov_imm x0, CRASH_CONSOLE_BASE 56 mov_imm x1, PL011_UART_CLK_IN_HZ 57 mov_imm x2, PL011_BAUDRATE 58 b console_core_init 59 60 /* --------------------------------------------- 61 * int plat_crash_console_putc(int c) 62 * Function to print a character on the crash 63 * console without a C Runtime. 64 * Clobber list : x1, x2 65 * --------------------------------------------- 66 */ 67func plat_crash_console_putc 68 mov_imm x1, CRASH_CONSOLE_BASE 69 b console_core_putc 70 71 /* --------------------------------------------- 72 * void plat_report_exception(unsigned int type) 73 * Function to report an unhandled exception 74 * with platform-specific means. 75 * On HIKEY platform, it updates the LEDs 76 * to indicate where we are 77 * --------------------------------------------- 78 */ 79func plat_report_exception 80 mov x8, x30 81 82 /* Turn on LED according to x0 (0 -- f) */ 83 /* 84 ldr x2, =0xf7020000 85 and x1, x0, #1 86 str w1, [x2, #4] 87 and x1, x0, #2 88 str w1, [x2, #8] 89 and x1, x0, #4 90 str w1, [x2, #16] 91 and x1, x0, #8 92 str w1, [x2, #32] 93 */ 94 95 adr x4, plat_err_str 96 bl asm_print_str 97 98 adr x4, esr_el3_str 99 bl asm_print_str 100 101 mrs x4, esr_el3 102 bl asm_print_hex 103 104 adr x4, elr_el3_str 105 bl asm_print_str 106 107 mrs x4, elr_el3 108 bl asm_print_hex 109 110 mov x30, x8 111 ret 112 113 /* ----------------------------------------------------- 114 * void plat_reset_handler(void); 115 * 116 * Implement workaround for defect id 831273 by enabling 117 * an event stream every 65536 cycles and set the L2 RAM 118 * latencies for Cortex-A57. 119 * ----------------------------------------------------- 120 */ 121func plat_reset_handler 122 /* In juno, it sets the latency of L2 Data and Tag. How about hikey? */ 123 /* Do anything just after reset. At here, do we need? */ 124 ret 125 126 /* 127 * Return 0 to 7 128 */ 129func platform_get_core_pos 130 and x1, x0, #MPIDR_CPU_MASK 131 and x0, x0, #MPIDR_CLUSTER_MASK 132 add x0, x1, x0, LSR #6 133 ret 134 135 /* ----------------------------------------------------- 136 * void platform_mem_init(void); 137 * 138 * We don't need to carry out any memory initialization 139 * on HIKEY. The Secure RAM is accessible straight away. 140 * ----------------------------------------------------- 141 */ 142func platform_mem_init 143 ret 144 145.section .rodata.rev_err_str, "aS" 146plat_err_str: 147 .asciz "\nPlatform exception reporting:" 148esr_el3_str: 149 .asciz "\nESR_EL3: " 150elr_el3_str: 151 .asciz "\nELR_EL3: " 152