1/* 2 * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved. 3 * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * Neither the name of ARM nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific 17 * prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <arch.h> 33#include <asm_macros.S> 34#include <hisi_sram_map.h> 35 36 .global pm_asm_code 37 .global pm_asm_code_end 38 .global v7_asm 39 .global v7_asm_end 40 41 .align 3 42func pm_asm_code 43 mov x0, 0 44 msr oslar_el1, x0 45 46 mrs x0, s3_1_c15_c2_0 47 bic x0, x0, #0x1E000000 48 orr x0, x0, #0x180000 49 orr x0, x0, #0xe000 50 msr s3_1_c15_c2_0, x0 51 52 mrs x3, actlr_el3 53 orr x3, x3, #(0x1<<5) 54 msr actlr_el3, x3 55 56 mrs x3, actlr_el2 57 orr x3, x3, #(0x1<<5) 58 msr actlr_el2, x3 59 60 ldr x3, =PWRCTRL_ACPU_ASM_D_ARM_PARA_AD 61 mrs x0, mpidr_el1 62 and x1, x0, #MPIDR_CPU_MASK 63 and x0, x0, #MPIDR_CLUSTER_MASK 64 add x0, x1, x0, LSR #6 65pen: ldr x4, [x3, x0, LSL #3] 66 cbz x4, pen 67 68 mov x0, #0x0 69 mov x1, #0x0 70 mov x2, #0x0 71 mov x3, #0x0 72 br x4 73 74 .ltorg 75 76pm_asm_code_end: 77 78 .align 3 79 .section .rodata.v7_asm, "aS" 80v7_asm: 81 .word 0xE1A00000 // nop 82 .word 0xE3A02003 // mov r2, #3 83 .word 0xEE0C2F50 // mcr 15, 0, r2, cr12, cr0, {2} 84 .word 0xE320F003 // wfi 85 86 .ltorg 87v7_asm_end: 88