1/* 2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <cci400.h> 32#include <gic_v2.h> 33#include "platform_def.h" 34#include "../juno_def.h" 35 36.section .rodata.gic_reg_name, "aS" 37gicc_regs: 38 .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 39gicd_pend_reg: 40 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" 41newline: 42 .asciz "\n" 43spacer: 44 .asciz ":\t\t0x" 45 46 47 /* --------------------------------------------- 48 * The below macro prints out relevant GIC 49 * registers whenever an unhandled exception is 50 * taken in BL3-1. 51 * Clobbers: x0 - x10, x16, sp 52 * --------------------------------------------- 53 */ 54 .macro plat_print_gic_regs 55 mov_imm x16, GICD_BASE 56 mov_imm x17, GICC_BASE 57 /* Load the gicc reg list to x6 */ 58 adr x6, gicc_regs 59 /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 60 ldr w8, [x17, #GICC_HPPIR] 61 ldr w9, [x17, #GICC_AHPPIR] 62 ldr w10, [x17, #GICC_CTLR] 63 /* Store to the crash buf and print to console */ 64 bl str_in_crash_buf_print 65 66 /* Print the GICD_ISPENDR regs */ 67 add x7, x16, #GICD_ISPENDR 68 adr x4, gicd_pend_reg 69 bl asm_print_str 70gicd_ispendr_loop: 71 sub x4, x7, x16 72 cmp x4, #0x280 73 b.eq exit_print_gic_regs 74 bl asm_print_hex 75 76 adr x4, spacer 77 bl asm_print_str 78 79 ldr x4, [x7], #8 80 bl asm_print_hex 81 82 adr x4, newline 83 bl asm_print_str 84 b gicd_ispendr_loop 85exit_print_gic_regs: 86 .endm 87 88.section .rodata.cci_reg_name, "aS" 89cci_iface_regs: 90 .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" 91 92 /* ------------------------------------------------ 93 * The below macro prints out relevant interconnect 94 * registers whenever an unhandled exception is 95 * taken in BL3-1. 96 * Clobbers: x0 - x9, sp 97 * ------------------------------------------------ 98 */ 99 .macro plat_print_interconnect_regs 100 adr x6, cci_iface_regs 101 /* Store in x7 the base address of the first interface */ 102 mov_imm x7, (CCI400_BASE + SLAVE_IFACE3_OFFSET) 103 ldr w8, [x7, #SNOOP_CTRL_REG] 104 /* Store in x7 the base address of the second interface */ 105 mov_imm x7, (CCI400_BASE + SLAVE_IFACE4_OFFSET) 106 ldr w9, [x7, #SNOOP_CTRL_REG] 107 /* Store to the crash buf and print to console */ 108 bl str_in_crash_buf_print 109 .endm 110